Semiconductor device including a low resistance wiring layer

Details Semiconductor device including a low resistance wiring layer Semiconductor device including a low resistance wiring layer

2005-09-13

2005-09-13

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S349000, C257S350000, C257S351000, C257S368000, C257S369000, C257S375000

Reexamination Certificate

active

06943411

ABSTRACT:
A semiconductor device can include a low resistance wiring layer (13) formed in, and extending along a base material. A number of element regions (14) are formed separate from one another, each in contact with wiring layer (13). A circuit element can be formed in each element region (14). A metal is preferably used for wiring layer (13). In the above arrangement, metal-oxide-semiconductor (MOS) type transistors can be provided in a silicon-on-insulator (SOI) substrate that can have different potentials applied to a source/drain region with respect to a channel region.

REFERENCES:
patent: 5587339 (1996-12-01), Wyborn et al.
patent: 5889306 (1999-03-01), Christensen et al.
patent: 10-209468 (1998-08-01), None

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