Method for determining, on a basis of a circuit diagram of a...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06842882

ABSTRACT:
The current that will be drawn by a digital circuit is predicted on the basis of its schematic circuit diagram. An equivalent circuit is generated, wherein circuit sections of the digital circuit, the output signal levels of which change or can change at the same time, are replaced by an inverter. This renders it possible to determine the current drawn by a digital circuit in a simple, fast and accurate manner even at its design stage.

REFERENCES:
patent: 5477460 (1995-12-01), Vakirtzis et al.
Hamaoui, A et al. “An Analytical Model for Current, Delay, and Power Analysis of Submicron CMOS Logic Circuits”, IEEE Transactions on Circuits and Systems -II: Analog and Digital Signal Processing, vol. 47, No. 10, Oct. 2000, pp 999-1007.*
Chatzigeorgiou, A. et al.: “A Modeling Technique for CMOS Gates”, IEEE, vol. 18, No. 5, May 1999, pp. 557-575.
Nabavi-Lishi, A. et al.: “Inverter Models of CMOS Gates For Supply Current And Delay Evaluation”, IEEE, vol. 13, No. 10, Oct. 1994, pp. 1271-1279.
Kong, J.T. et al.: “Performance Estimation Of Complex MOS Gates”, IEEE, vol. 44, No. 9, Sep. 1997, pp. 785-795.
Cremoux, S. et al.: “Delay-Power Performance Analysis”, IEEE, Sep. 1999, pp. 1543-1546.
Kriplani, H. et al.: “Improved Delay And Current Models For Estimating Maximum Currents in CMOS VLSI Circuits”, pp. 435-438.

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