Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S229000

Reexamination Certificate

active

06947345

ABSTRACT:
A semiconductor memory device is provided, which is capable of effectively reducing a current comsumption caused by a self-refresh operation in a stand-by mode.In the refresh operation in the stand-by mode, under the control by a refresh control circuit8B, firstly, a suppression is made for current driving abilities of sense amplifiers70A˜70D provided for amplifying data signals appearing on bit lines, and secondly, an expansion is made of a pulse width of a row enable signal RE, which defines a period of time for selecting word lines WL, and thirdly, parallel activations of plural word lines are made based on the row enable signal RE with the expanded pulse width, thereby reducing the frequency of operations of the circuit system associated with the refresh operations, resulting in a suppression of the current consumption.

REFERENCES:
patent: 4616346 (1986-10-01), Nakaizumi et al.
patent: 4716551 (1987-12-01), Inagaki
patent: 6765839 (2004-07-01), Park
patent: 1 235 228 (2002-08-01), None
patent: 1-159893 (1989-06-01), None
patent: 4-259986 (1992-09-01), None
patent: WO 01/41149 (2001-06-01), None

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