Semiconductor device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Mosfet type gate sidewall insulating spacer

Reexamination Certificate

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Details

C257S339000, C257S344000, C257S346000, C257S408000, C438S230000, C438S301000, C438S303000, C438S289000

Reexamination Certificate

active

06838777

ABSTRACT:
Gate electrodes (3) are formed on a semiconductor substrate (1), each with a gate insulating film (2) interposed therebetween. A pair of offset spacers (4) are respectively formed on opposite side faces of each of the gate insulating film (2) and the gate electrodes (3). Diffusion layers (5) are formed in the semiconductor substrate (1) on opposite sides of a portion of the semiconductor substrate (1) immediately under each of the gate electrodes (3), by ion implantation. While the gate electrodes (3) have various configurations such as a gate electrode having a rectangular section, an upwardly tapered gate electrode and a downwardly tapered gate electrode, respective configurations of the offset spacers (4) are adjusted so that lengths each obtained by adding the gate length of the gate electrode (3), which gate length extends on an interface between the gate insulating film (2) and the gate electrode (3), to a width of the pair of the offset spacers (4), which width extends on an interface between the offset spacers (4) and the semiconductor substrate (1), are substantially uniform.

REFERENCES:
patent: 5863824 (1999-01-01), Gardner et al.
patent: 5877530 (1999-03-01), Aronowitz et al.
patent: 6433871 (2002-08-01), Lensing et al.
patent: 6703648 (2004-03-01), Xiang et al.
patent: 20010009792 (2001-07-01), Bothra et al.
patent: 8-204184 (1996-08-01), None
patent: 2002-289841 (2002-10-01), None

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