Methods of manufacturing transistors using dummy gate patterns

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S296000, C438S301000

Reexamination Certificate

active

06875680

ABSTRACT:
Example methods of manufacturing a transistor using a dummy gate pattern are disclosed. A local channel is formed by local channel implantation using the dummy gate pattern after a source and a drain are formed so that a short channel effect can be minimized and a reverse SCE can be reduced.

REFERENCES:
patent: 6054355 (2000-04-01), Inumiya et al.
patent: 6251763 (2001-06-01), Inumiya et al.

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