Stack package using flexible double wiring substrate

Details Stack package using flexible double wiring substrate Stack package using flexible double wiring substrate

2005-04-05

2005-04-05

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S723000, C257S777000

Reexamination Certificate

active

06876074

ABSTRACT:
A Chip Scale Package (CSP) type unit package including a semiconductor chip and a double wiring substrate, the double wiring substrate including an adhesive and a flexible tape having an upper surface with a first wiring pattern, a lower surface with a second wiring pattern and a plurality of vias electrically connecting portions of the first and second wiring patterns. Additionally, the unit package may be stacked on a conventional base package or on another unit package, where stacked packages are electrically interconnected.

REFERENCES:
patent: 5714405 (1998-02-01), Tsubosaki et al.
patent: 5793870 (1998-08-01), Conley
patent: 6218731 (2001-04-01), Huang et al.
patent: 6376769 (2002-04-01), Chung
patent: 10-144851 (1998-05-01), None
patent: 10-242379 (1998-09-01), None
patent: 1020000025382 (2000-05-01), None
patent: 2001-0075955 (2001-11-01), None

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