Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-05-31
2005-05-31
Elmore, Reba I. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S119000, C711S130000
Reexamination Certificate
active
06901489
ABSTRACT:
A system includes a memory, a sequencer, and a set of application engines in communication with the sequencer and memory. The set of application engines includes a streaming input engine for retrieving data from the memory and supplying the data to the set of application engines. In one embodiment, the streaming input engine includes a fetch engine with a memory opcode output and address output for accessing cache memory. The streaming input engine also includes an alignment circuit for buffering and aligning data retrieved from the memory. The alignment circuit includes a data buffer, register, byte selector, and shifter. The data buffer stores data accessed by the fetch engine. The register stores old data from the data buffer's output when the buffer sources new data. The byte selector selects data from the data buffer and the register. The shifter receives data selected by the byte selector and shifts a number of the bytes onto an output for retrieval by an output register coupled to the set of application engines.
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Gruner Fred
Ramirez Ricardo
Elmore Reba I.
Juniper Networks, Inc.
Shumaker & Sieffert P.A.
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