Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-07-05
2005-07-05
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06915503
ABSTRACT:
Methods of using “noise cores” in a PLD design. “Noise cores” are pre-developed blocks of logic included in a PLD design for the purpose of creating noise in other circuits also implemented in the PLD. By gradually increasing the level of noise created by the noise core, the noise sensitivity of the user circuit can be determined. Also, by ensuring that the user circuit functions properly when combined with the noise core, a designer can have confidence that unmodified portions of the user circuit will still function properly when the user circuit is modified. In some embodiments, once the user circuit has been qualified with the noise core operational, the noise core is disabled prior to including the PLD design in a system. Because the user circuit is proven to withstand a certain level of noise, future additions to the design do not necessarily require re-qualification of the user circuit.
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Cartier Lois D.
Levin Naum
Maunu LeRoy D.
Siek Vuthe
Xilinx , Inc.
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