Thin film magnetic memory device sharing an access element...

Details Thin film magnetic memory device sharing an access element... Thin film magnetic memory device sharing an access element...

2002-08-19

2004-06-29

Tran, M. (Department: 2818)

Static information storage and retrieval

Systems using particular element

Magnetic thin film

C365S230070

Reexamination Certificate

active

06757191

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a thin film magnetic memory device. More particularly, the present invention relates to a random access memory (RAM) including memory cells having a magnetic tunnel junction (MTJ).
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) device has attracted attention as a memory device capable of non-volatile data storage with low power consumption. The MRAM device is a memory device capable of non-volatile data storage using a plurality of thin film magnetic elements formed in a semiconductor integrated circuit and also capable of random access to each thin film magnetic element.
In particular, recent announcement shows that the use of thin film magnetic elements having a magnetic tunnel junction (MTJ) as memory cells significantly improves performance of the MRAM device. The MRAM device including memory cells having a magnetic tunnel junction is disclosed in technical documents such as “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC Digest of Technical Papers, TA7.2, February 2000, and “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical Papers, TA7.3, February 2000.
FIG. 18
schematically shows the structure of a memory cell having a magnetic tunnel junction (hereinafter, sometimes simply referred to as “MTJ memory cell”).
Referring to
FIG. 18
, the MTJ memory cell includes a tunneling magneto-resistance element TMR having an electric resistance varying according to a magnetically written storage data level, and an access element ATR. Access transistor ATR is connected in series with tunneling magneto-resistance element TMR between a bit line BL and a ground line GL. Typically, a field effect transistor is used as access transistor ATR.
A bit line BL, a write digit line WDL, a word line WL and a ground line GL are provided for the MTJ memory cell. Bit line BL passes a data write current therethrough in data write operation, and passes a data read current therethrough in data read operation. Write digit line WDL passes a data write current therethrough in data write operation. Word line WL is used for data read operation. Ground line GL pulls down tunneling magneto-resistance element TMR to a ground voltage GND in data read operation.
In data read operation, tunneling magneto-resistance element TMR is electrically coupled between ground line GL (ground voltage GND) and bit line BL in response to turning-ON of access transistor ATR.
FIG. 19
is a conceptual diagram illustrating data write operation to the MTJ memory cell.
Referring to
FIG. 19
, tunneling magneto-resistance element TMR has a magnetic layer FL having a fixed magnetization direction (hereinafter, sometimes simply referred to as “fixed magnetic layer”), and a magnetic layer VL that is magnetized in the direction according to a data write magnetic field generated by a data write current (hereinafter, sometimes simply referred to as “free magnetic layer”). A tunneling barrier TB is interposed between fixed magnetic layer FL and free magnetic layer VL. Tunneling barrier TB is formed from an insulting film. Free magnetic layer VL is magnetized either in the same (parallel) direction as, or in the opposite (antiparallel) direction to, that of fixed magnetic layer FL according to the write data level.
The electric resistance of tunneling magneto-resistance element TMR varies according to the relation between the respective magnetization directions of fixed magnetic layer FL and free magnetic layer VL. More specifically, when fixed magnetic layer FL and free magnetic layer VL have parallel magnetization directions, tunneling magneto-resistance element TMR has a smaller electric resistance than when they have antiparallel magnetization directions.
In data write operation, word line WL is inactivated and access transistor ATR is turned OFF. In this state, a data write current for magnetizing free magnetic layer VL is applied to bit line BL and write digit line WDL in the direction according to the write data level. In other words, the magnetization direction of free magnetic layer VL is determined according to the direction of the data write current flowing through bit line BL and write digit line WDL.
FIG. 20
is a conceptual diagram illustrating the relation between the data write current and magnetization of free magnetic layer VL.
Referring to
FIG. 20
, magnetic field Hx on the abscissa indicates the direction of a magnetic field H(WDL) produced by a data write current flowing through write digit line WDL. On the other hand, magnetic field Hy on the ordinate indicates a magnetic field H(BL) produced by a data write current flowing through bit line BL.
The magnetization direction of free magnetic layer VL can be rewritten only when the sum of magnetic fields H(WDL) and H(BL) reaches the region outside the asteroid characteristic line shown in the figure. In other words, in order to conduct data write operation, a data write current sufficient to produce a magnetic field exceeding a prescribed strength must be applied to both write digit line WDL and bit line BL.
When a magnetic field corresponding to the region inside the asteroid characteristic line is applied, the magnetization direction of free magnetic layer VL does not change. In other words, data write operation is not conducted when a prescribed data write current is supplied to either write digit line WDL or bit line BL. The magnetization direction written to tunneling magneto-resistance element TMR, i.e., the storage data level, is held in a non-volatile manner until another data write operation is conducted.
FIG. 21
is a conceptual diagram illustrating data read operation from the MTJ memory cell.
Referring to
FIG. 21
, in data read operation, access transistor ATR is turned ON in response to activation of word line WL. As a result, tunneling magneto-resistance element TMR pulled down to ground voltage GND is electrically coupled to bit line BL. In this state, a data read current Is is supplied to a current path including bit line BL and tunneling magneto-resistance element TMR. As a result, the voltage on bit line BL changes according to the electric resistance of the tunneling magneto-resistance element TMR, that is, the storage data level of the MTJ memory cell. For example, a data read current Is is supplied after bit line BL is precharged to a prescribed voltage. In this case, the storage data in the MTJ memory cell can be read by sensing the voltage on bit line BL.
Note that, in data read operation, a data read current flows through tunneling magneto-resistance element TMR. However, data read current Is is commonly one to two orders smaller than the above data write current. Accordingly, the MTJ memory cell is not likely to be erroneously rewritten by the data read current Is in data read operation.
FIG. 22
shows the structure of a MTJ memory cell fabricated on a semiconductor substrate.
Referring to
FIG. 22
, an access transistor ATR formed on a semiconductor main substrate SUB has source/drain regions (n-type regions)
310
,
320
and a gate
330
. Source/drain region
310
is electrically coupled to a ground line GL through a metal film formed in a contact hole
341
.
Write digit line WDL is formed in a metal wiring layer above ground line GL. A tunneling magneto-resistance element TMR is formed in a layer above write digit line WDL. Tunneling magneto-resistance element TMR is electrically coupled to source/drain region
320
of access transistor ATR through a strap SL and a metal film formed in a contact hole
340
. Strap SL is formed from an electrically conductive material, and serves to electrically couple tunneling magneto-resistance element TMR to access transistor ATR.
Bit line BL is electrically coupled to tunneling magneto-resistance element TMR and is formed in a layer above tunneling magneto-resistance element TMR. As described before, in data write operation, a data write current must be supplied to both bit li

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