Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-04-23
2004-06-01
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S306000, C257S310000
Reexamination Certificate
active
06744092
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a ferroelectric RAM (FeRAM) device; and, more particularly, to a memory device that prevents oxidation of a plug caused by oxygen diffusion into the interface between the plug and the bottom electrode and a fabrication method thereof.
DESCRIPTION OF THE PRIOR ART
A ferroelectric RAM (FeRAM) device is a sort of a nonvolatile memory device using a polarization property of a ferroelectric layer and hysteresis. It is an ideal memory with the advantage of retaining stored information even when the power is turned off, as well as high speed, high capacity and low electric power. As for the dielectric material of the FeRAM, a layer of SrBi
2
Ta
2
O
9
(SBT), Sr
x
Bi
2-y
(Ta
i
Nb
j
)
2
O
9-z
(SBTN), Pb(Zr
x
Ti
1-x
)O
3
(PZT), SrTiO
3
(ST) or Bi
4-x
La
x
Ti
3
O
12
(BLT) is mostly used. The bottom electrode of a capacitor incorporating the ferroelectric layer is usually formed of Pt, Ir, Ru or an oxide thereof.
To apply the conventional fabrication method of a memory device to the method of fabricating a FeRAM device, it is better to use a ferroelectric layer which has a low crystallization temperature. Also, the contact resistance between the bottom electrode of the capacitor and the plug should be prevented from increasing. Studies on lowering the crystallization temperature of a conventional ferroelectric layer have made much progress, but the technology preventing the increase of a contact resistance between the plug and the bottom electrode is at a standstill. The contact resistance between the plug and the bottom electrode increases, because the polysilicon plug is oxidized during the procedure of a high temperature thermal treatment in an ambient of oxygen for forming a ferroelectric layer. That is, in the subsequent thermal process carried out in an ambient of oxygen for crystallizing the ferroelectric layer, the oxygen diffuses into the interface of the polysilicon plug and the capacitor bottom electrode and oxidizes the surface of polysilicon plug, thus increasing the contact resistance.
FIG. 1
is a cross-sectional view illustrating a structure of a ferroelectric capacitor of a conventional semiconductor device. The semiconductor device of
FIG. 1
is formed by a method described below. That is, an inter-layer dielectric layer (ILD) is deposited on the semiconductor substrate
145
with a high doping area
140
, and a contact hole connected to the high doping area
140
is formed by selectively etching the ILD. Subsequently, a polysilicon plug
100
is formed by filling up the contact hole with polysilicon, and then a barrier layer
150
of Ti, TiN or TaN is formed on the polysilicon plug
100
. After that, a capacitor composed of a bottom electrode
125
, a ferroelectric layer
130
and a top electrode
135
is formed on the barrier layer
150
.
As described above, the oxygen diffusion barrier layer
150
is formed of Ti, TiN or TaN between the bottom electrode
125
and the polysilicon layer plug
150
to prevent the oxygen from being diffused. However, the barrier layer
150
formed of Ti, TiN or TaN cannot perform its role properly because it loses its characteristics as a diffusion barrier layer at around 500° C. Although studies have been done on the barrier metal of a three-element compound such as TiAlN or TaSiN, to prevent the diffusion more effectively, the problem of the barrier layer
150
being oxidized at over 600° C. or of the barrier layer structure being destroyed has not been solved yet.
In addition, the structure of the semiconductor device shown in
FIG. 1
has a problem that the barrier layer
150
becomes non-conductive, because the bottom electrode
125
and the sides of the barrier layer
150
are exposed during the formation process of a ferroelectric layer
130
and the barrier layer
150
is oxidized while the ferroelectric layer is deposited.
Therefore, researchers are actively conducting research to prevent the oxidation by transforming the structure of a plug. That is, the aim of the research is moving from developing oxygen diffusion materials towards a method for blocking the oxygen diffusion or increasing paths for oxygen.
FIG. 2
shows a structure forming the barrier layer
150
in the contact hole, which is known as a stable plug structure. The reference numerals of
FIG. 2
are the same as those of FIG.
1
. However, the structure of the semiconductor device shown in
FIG. 2
is more or less acceptable in the aspect of anti-oxidation, compared to other existing structures, but this structure as well does not prevent oxygen diffusion effectively. As an example of this, in the case the bottom electrode
125
of a semiconductor device with the structure of
FIG. 2
is formed of Pt which causes a lot of oxygen diffusion, and the barrier layer
150
is formed of TiN, the property of the semiconductor deteriorates in a thermal process carried out at around 500° C. Moreover, when doing so, the fabricating process becomes more complicated than fabricating the semiconductor device structure of
FIG. 1
, which leads to an increase in production costs.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a semiconductor device, which employs an oxygen diffusion barrier layer inside a plug to protect the plug from being oxidized during a high temperature thermal treatment in an ambient of oxygen effectively, and a fabrication method thereof.
In accordance with an embodiment of the present invention, there is provided a semiconductor device, comprising: an inter-layer dielectric layer formed on a semiconductor substrate with a contact hole inside; a diffusion barrier layer formed at the bottom and on the sides of the contact hole; an oxidation barrier layer formed on the diffusion barrier layer for filling up the contact hole; a bottom electrode of a capacitor contacting the diffusion barrier layer and the anti-oxidation layer; a dielectric layer formed on the bottom electrode; and a top electrode formed on the dielectric layer.
In accordance with an embodiment of the present invention, there is provided a method for fabricating a semiconductor device, comprising the steps of: forming an inter-layer dielectric layer on a semiconductor substrate; forming a contact hole by selectively etching the inter-layer dielectric layer; forming a diffusion barrier layer at the bottom and on the sides of the contact hole; filling up the contact hole by forming an oxidation barrier layer on the anti-diffusion layer; forming a bottom electrode of a capacitor contacting the diffusion barrier layer and the anti-oxidation layer; forming a dielectric layer on the bottom electrode; and forming a top electrode on the dielectric layer.
REFERENCES:
patent: 5856704 (1999-01-01), Schuele
patent: 6043529 (2000-03-01), Hartner et al.
patent: 6180447 (2001-01-01), Park et al.
patent: 6400552 (2002-06-01), Al-Shareef et al.
patent: 6590246 (2003-07-01), Agarwal
patent: 6645779 (2003-11-01), Hong
patent: 2001/0020715 (2001-09-01), Yamasaki et al.
patent: 2002/0070404 (2002-06-01), Bruchhaus et al.
patent: 2002/0084481 (2002-07-01), Lian et al.
patent: 1999-10450 (1999-02-01), None
patent: 2001-1595 (2001-01-01), None
Estrada Michelle
Fourson George
Hynix / Semiconductor Inc.
Jacobson & Holman PLLC
LandOfFree
Semiconductor memory device capable of preventing oxidation... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device capable of preventing oxidation..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device capable of preventing oxidation... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3364602