Limiting concurrent modification and execution of...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

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Details

C717S111000, C717S168000

Reexamination Certificate

active

06823445

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to computer processor architectures, and more specifically to the concurrent modification of executing programs.
2. Description of Related Art
Most current processor architectures do not explicitly support, and many prohibit, an environment in which a program thread modifies one or more instructions, while one or more program threads may be executing the instructions being modified by the first program thread.
When modifying an executing program, in general, the limitation of the prior art requires ensuring that none of the threads of a program will execute the instructions being modified while they are being modified. This can be done in a number of ways. For example, all threads of the program could be halted or terminated, the program modified, and then the threads restarted. However, this approach is not feasible in many environments where an application must be continuously available (e.g. a program that controls point of sales terminals). This is especially true for the operating system program, because halting it will cause all programs and operations in the system to halt, including Input/Output (I/O).
An alternative approach that does not require halting the program is to ensure that none of the program threads are executing the instructions that are being modified. However, this requires that the program contain additional complex logic that often degrades performance even when the function is not being used. Furthermore, it is very difficult to predict all the places in the program where such logic should be inserted.
Therefore, it would be desirable to have a processor architecture that supports the modification of an executing program such that the result is deterministic. This ability makes it much easier for a programmer to isolate a programming error or to identify frequently used portions of a program. It also makes it possible to patch an executing program to correct a programming error, or to improve the performance of a program while it is executing by recompiling portions of the program without halting the program.
SUMMARY OF THE INVENTION
The present invention provides a method, program, and system for modifying computer program instructions during execution of those instructions. The invention comprises writing a first instruction into a memory location, wherein the instruction is a patch class instruction. This first instruction is then fetched from the memory location and executed. Concurrent with execution of the first instruction, the memory location is overwritten with a second instruction, which is also a patch class instruction. Because the first and second instructions are patch class instructions, if a program is executing from the memory location, or returns to execute from that location, it will fetch and execute either the first instruction or the second instruction. In one embodiment, reconciling the processor's execution pipeline with the memory location will ensure that the second instruction is fetched and executed if the program returns to execute from that location.


REFERENCES:
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patent: 5835949 (1998-11-01), Quattromani et al.
patent: 6336212 (2002-01-01), Gray et al.
patent: 6389512 (2002-05-01), Mahalingaiah et al.
patent: 6405307 (2002-06-01), Murty et al.
patent: 6691308 (2004-02-01), Kasper

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