Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1994-05-31
2004-08-31
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S346000, C257S402000, C257S403000, C257S345000
Reexamination Certificate
active
06784492
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device including a gate-insulated transistor.
2. Related Background Art
MOS transistors are already known among gate-insulated transistors, and the enhancement MOS transistor is known among such MOS transistors.
A low carrier mobility is induced, for example, by ion scattering (Coulomb scattering) resulting from impurity, scattering caused by coarse interface between an insulator and a semiconductor, and a disperse scattering resulting from an electric field perpendicular to the surface.
In a MOS transistor, the carriers are generated in an inversion channel with a width as narrow as about 100 Å, having a steep electric field E
V
perpendicular to the surface, so that the carrier mobility is easily in the level of 10
6
V/cm. The carrier mobility is therefore directly influenced by such electric field, and becomes lower than the mobility specific to the semiconductor.
FIG. 11
shows the relation between the carrier mobility and the perpendicular electric field E
V
. The mobility is principally governed by the Coulomb scattering under a weak electric field, by the phonon scattering under a medium electric field, and by the scattering caused by surface coarseness under a strong electric field. Though the mobility &mgr; of electrons in the silicon semiconductor itself is about 1500 cm
2
/V·sec at a temperature of about 300° K., the mobility in a MOS transistor is 300-700 cm
2
/V·sec at maximum under the medium to high electric field corresponding to the functioning condition of the transistor.
For this reason, in case of forming a MOS transistor with SOI technology, it has been tried to form an extremely thin semiconductor layer, thereby depleting the channel area and thus suppressing the dispersion scattering and impurity scattering. It has however been difficult technically to sufficiently reduce the influence of the coarseness of interface or to stably produce the channel layer with a thickness not exceeding 500 Å.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device which reduces the interface scattering, dispersion scattering and Coulomb scattering, thereby increasing the carrier mobility, whereby the conversion conductance g
m
becomes larger and the response speed becomes faster.
Another object of the present invention is to provide a semiconductor device which can achieve relaxation of the electric field at the drain side, thereby reducing the hot carrier generation and also reducing the deterioration in the drain breakdown voltage and the Kimpf effect specific to the SOI structure.
Still another object of the present invention is to provide a semiconductor device showing a large carrier mobility even with a large thickness of the channel layer and being therefore adapted to mass production.
Still another object of the present invention is to provide a semiconductor device with a lowered impurity concentration of the channel in the carrier conduction area, for the purpose of eliminating Coulomb scattering.
Still another object of the present invention is to provide a semiconductor device in which the intensity of the perpendicular electric field in the carrier conduction area is lowered and the carrier conduction area is widened, thereby reducing the dispersion scattering.
Still another object of the present invention is to provide a semiconductor device in which the carriers are excluded in the vicinity of the interface between the gate insulation film and the semiconductor, whereby the influence of coarseness of said interface is excluded.
Still another object of the present invention is to provide a semiconductor device of a low parasite capacitance, in which the channel area is made thicker to enable stable mass production while retaining characteristics of the SOI device.
Still another object of the present invention is to provide a MOS transistor with improved carrier mobility which is an important parameter determining the characteristics of the transistor.
REFERENCES:
patent: 4000504 (1976-12-01), Berger
patent: 4219829 (1980-08-01), Dorda et al.
patent: 4276095 (1981-06-01), Beilstein, Jr. et al.
patent: 4575746 (1986-03-01), Dingwall
patent: 4701775 (1987-10-01), Cosentino et al.
patent: 4819043 (1989-04-01), Yazawa et al.
patent: 57-31177 (1982-02-01), None
patent: 60-50960 (1985-03-01), None
Canon Kabushiki Kaisha
Loke Steven
LandOfFree
Semiconductor device including a gate-insulated transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device including a gate-insulated transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device including a gate-insulated transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3352567