Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-02-12
2004-11-02
Gurley, Lynne A. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S623000, C438S624000, C438S626000, C438S631000, C438S637000, C438S639000, C438S666000, C438S780000, C438S782000, C438S787000, C438S790000, C438S906000, C438S948000, C438S963000
Reexamination Certificate
active
06812128
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device having a multilayer structure, and particularly to a method using a material bearing a low specific inductive capacity as an interlayer insulating film.
2. Description of the Related Art
A silicon oxide film has heretofore been used as an interlayer insulating film of a semiconductor device having a multilayer structure. In recent years, however, a start has been made at using materials lower in specific inductive capacity than the silicon oxide film in order to reduce a signal transfer delay of a wiring with high integration of circuit elements.
Of such types of materials, HSQ (Hydrogen silisesquioxane) and MSQ (Methyl silisesquioxane) each assuming a specific inductive capacity of about 3.0 have led to a stage intended for practical use.
The HSQ is a silicon oxide compound containing Si—H bonds. Further, the MSQ is a silicon oxide compound containing Si—CH
3
bonds. These materials are applied onto a semiconductor substrate and thereafter heated and baked, whereby they can be brought to interlayer insulating films.
However, the following problems have arisen upon actually manufacturing a multilayer structured semiconductor device by using these materials.
Namely, these materials easily deteriorate or change in quality due to being exposed to plasma or a solution of a chemical agent. This is because SiH and Si—CH
3
are easily transformed to Si—O due to the plasma or the solution of chemical agent.
Accordingly, these materials change in quality in an etching step, a resist ashing step, a cleaning step, etc. normally executed upon the manufacture of the semiconductor device. Thus, there were cases in which their dielectric constants increased and the materials were eroded (encroachment).
Particularly when the MSQ was used, it eroded rapidly due to a WF
6
gas and hence a large-scale cavity was apt to occur. Further, a tungsten film has partly grown within the cavity to thereby short-circuit between wirings.
SUMMARY OF THE INVENTION
The present invention adopts the following configurations to solve the foregoing problems.
There is provided a method of manufacturing a multilayer structured semiconductor device, wherein when a step for forming a wiring on a semiconductor substrate, a step for forming a first silicon oxide film on the semiconductor substrate having the wiring, and a step for forming an interlayer insulting film composed of a material bearing a low specific inductive capacity on the first silicon oxide film are sequentially executed to form a multilayered wiring, the interlayer insulating film is formed to a thin thickness corresponding to a step of the first silicon oxide film so as not to extend beyond the step of the first silicon oxide film covering the wiring formed on the semiconductor substrate.
In the above-described method, the interlayer insulating film composed of the material bearing the low specific inductive capacity is formed to a thin thickness corresponding to the step of the wiring formed on the semiconductor substrate so as not to extend beyond the step when the first silicon oxide film is omitted.
After the above steps, a step for forming a second silicon oxide film on the interlayer insulating film, a step for planarizing the second silicon oxide film, a step for patterning a resist for forming a hole communicating with the wiring by lithography, a step for etching the second silicon oxide film and the first silicon oxide film with the resist as a mask, a step for removing the resist by ashing after the completion of the etching, and a step for cleaning the wired semiconductor substrate with the remaining ashed resist by chemicals are continuously executed to complete a multilayer structured semiconductor device
There is provided a method of manufacturing a multilayer structured semiconductor device, wherein in the case where a step for forming a wiring on a semiconductor substrate, a step for forming a first silicon oxide film on the semiconductor substrate having the wiring, and a step for forming an interlayer insulting film composed of a material bearing a low specific inductive capacity on the first silicon oxide film are sequentially executed to form a multilayered wiring, even when the position of a hole communicating with the wiring formed on the semiconductor substrate is displaced, the first silicon oxide film is formed to a thick thickness corresponding to the displacement so that the hole makes no contact with the material bearing the low specific inductive capacity.
After the above steps, a step for forming a second silicon oxide film on the interlayer insulating film, a step for planarizing the second silicon oxide film, a step for patterning a resist for forming a hole communicating with the wiring by lithography, a step for etching the second silicon oxide film and the first silicon oxide film with the resist as a mask, a step for removing the resist by ashing after the completion of the etching, and a step for cleaning the wired semiconductor substrate with the remaining ashed resist by chemicals are continuously executed to complete a multilayer structured semiconductor device.
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Gurley Lynne A.
Oki Electric Industry Co. Ltd.
Volentine Francos & Whitt PLLC
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