Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2001-07-24
2004-06-01
Nelms, David (Department: 2818)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S109000, C365S110000, C365S112000, C365S175000, C365S215000, C365S064000, C365S072000
Reexamination Certificate
active
06744681
ABSTRACT:
BACKGROUND
The present invention relates to information storage devices. More specifically, the present invention relates to one-time programmable (OTP) solid state memory.
Portable devices such as PDAs, handheld computers, digital cameras and digital music players include memory for storing data, digital images and MP3 files. Different types of memory are available for these portable devices. Conventional memory types include flash memory, mini-hard drives, mini-compact discs, and magnetic tape. However, each of these memory types has one or more of the following limitations: large physical size, low storage capacity, relatively high cost, poor robustness, slow access time and high power consumption.
A solid state diode-based OTP memory is disclosed in assignee's U.S. Ser. No. 09/875,356 filed Jun. 5, 2001. Compared to the conventional memory, the diode-based memory has a high shock tolerance, low power consumption, fast access time, moderate transfer rate and good storage capacity. The diode-based memory can fit into a standard portable interface (e.g., PCMCIA, CF) of a portable device.
Address logic of the diode-based memory device is formed on the same level as main memory. In a multi-level diode-based memory device, each level has main memory and address logic (unlike conventional solid state memory such as DRAM). Moreover, the address logic of the diode-based memory device is programmable. The address logic may be programmed after each layer has been fabricated. Since no masking is required, physical processing is simplified.
Defective areas in the address logic and main memory can occur during manufacture. These defective areas can render certain memory elements unusable.
SUMMARY
According to one aspect of the present invention, a solid state memory device is fabricated by forming a level of the device; identifying defective areas in the level; and programming address logic of the level to avoid the defective areas in the level.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the present invention.
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Nelms David
Pham Ly Duy
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