Electrical computers and digital processing systems: support – Computer power control
Reexamination Certificate
2000-06-16
2004-02-10
Lee, Thomas (Department: 2185)
Electrical computers and digital processing systems: support
Computer power control
C713S001000, C711S173000
Reexamination Certificate
active
06691234
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the power and thermal management of computer systems and devices. More specifically, the present invention relates to an apparatus, method, and system for resuming from an Advanced Configuration and Power Interface (ACPI) S
3
sleeping state using S
3
resume code stored in a reserved portion of system memory.
BACKGROUND OF THE INVENTION
As computer devices and systems continue to advance and become more complex, effective and efficient power and thermal management of computer devices and systems have become more and more critical in system design and implementation. In general, computer devices are designed to have different operating modes or power states that correspond to different levels of performance and power consumption. A standard specification for computer power and thermal management system and interfaces is the advanced configuration and power interface (ACPI) specification, developed jointly by Intel Corporation of Santa Clara, Calif., Microsoft Corporation of Redmond, Wash., and Toshiba Corporation of Tokyo, Japan. The ACPI specification is one of the key elements in an operating system directed power management (OSPM). ACPI specification is a publicly available document and can be obtained via the Internet at [http://www.teleport.com/~acpi/]http://www.teleport.com/~acpi/.
The ACPI specification defines a number of global system states (Gx states) that apply to the entire system and are visible to the user. These various global system states include: (1) G
0
global working state; (2) G
1
global sleeping state; (2) G
2
soft off state; and G
3
mechanical off state. G
0
working state is a computer state where the system dispatches user mode (application) threads and they execute. In this state, devices (peripherals) are dynamically having their power state changed. G
1
sleeping state is a computer state where the computer consumes a small amount of power, user mode threads are not being executed, and the system “appears” to be off (from an end user's perspective, the display is off, etc.). Latency for returning to the working state varies upon the wakeup environment selected prior to entry of this state. Work can be resumed without rebooting the OS because large elements of system context are saved by the hardware and the rest by the system software. G
2
soft off state is a computer state where the computer consumes a minimal amount of power. No user mode or system mode code is run. This state requires a large latency in order to return to the working state. The system's context will not be preserved by the hardware. The system needs to be restarted to return to the working state. G
3
is a computer state that is entered and left by a mechanical means (e.g., turning off the system's power through the movement of a large switch, etc.). The ACPI also defines various device power states including a D0 device power state, a D
1
device power state, D
2
device power state, and D
3
device power state. Device power states are states of particular devices and they are generally not visible to the user. The ACPI defines various processor power states that are processor power consumption and thermal management states within the global working state. These various processor power states include a C
0
power state, a C
1
power state, a C
2
power state, and a C
3
power state.
There are various types of sleeping states within the global sleeping state including S
1
, S
2
, S
3
, and S
4
sleeping states. The S
1
sleeping state is a low wake-up latency sleeping state. In this state, no system context is lost (CPU or chipset) and hardware maintains all system context. The S
2
sleeping state is a low wake-up latency sleeping state except the CPU and system cache context is lost (the OS is responsible for maintaining the caches and CPU context). Control starts from the processor's reset vector after the wake-up event. The S
3
sleeping state is a low wake-up latency sleeping state where all system context is lost except system memory. CPU, cache, and chipset context are lost in this state. Hardware maintains memory context and restores some CPU and L
2
configuration context. Control starts from the processor's reset vector after the wake-up event. The S
4
sleeping state is the lowest power, longest wake-up latency sleeping state supported by ACPI. In order to reduce power to a minimum, it is assumed that the hardware platform has powered off all devices.
In the ACPI S
3
sleeping state, all system context is lost except system memory. Hardware maintains system memory context by placing the system memory in a self-refresh mode when power is removed from the system. One of the responsibilities of system BIOS during a resume or transition from an S
3
sleeping state is to reinitialize the system and transfer control to the operating system (OS) waking vector without corrupting the OS image. This places an awkward requirement on system BIOS, which is to execute code without using the system memory. This requirement prevents the use of a stack, which is needed in order to develop resume code with a high level language. As a result, a typical BIOS S
3
resume path includes tightly managed assembly code forced to execute from flash memory in order to avoid using system memory. Consequently, this approach has several disadvantages including: (1) an S
3
resume implementation is resource limited because the amount of flash memory available for executing S
3
resume code is limited; (2) use of the assembly low level language for S
3
resume code does not allow for quick portability to a new architecture because assembly code cannot be simply recompiled by a compiler; and (3) the resume codes written in low level assembly language is not modular and less readable to engineers and/or programmers who need to maintain or enhance these codes.
REFERENCES:
patent: 5987536 (1999-11-01), Johnson et al.
patent: 6052793 (2000-04-01), Mermelstein
patent: 6085282 (2000-07-01), Hansen et al.
patent: 6115813 (2000-09-01), Hobson et al.
patent: 6505263 (2003-01-01), Larson et al.
patent: 6510488 (2003-01-01), Lasser
patent: 01261758 (1989-10-01), None
Blakely , Sokoloff, Taylor & Zafman LLP
Connolly Mark
Intel Corporation
Lee Thomas
LandOfFree
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