Semiconductor memory with hydrogen barrier

Details Semiconductor memory with hydrogen barrier Semiconductor memory with hydrogen barrier

2002-01-24

2004-06-15

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C438S386000, C438S238000

Reexamination Certificate

active

06750492

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor memory device and a method for manufacturing the same, and more particularly to improving the reliability of a semiconductor memory device.
In recent years, a ferroelectric memory device has been developed in the art in which the memory cell capacitor uses, in its capacitance insulating film, a ferroelectric material having hysteresis characteristics such as Pb(Zr,Ti)O
3
, SrBi
2
Ta
2
O
9
, or the like.
In order to realize a ferroelectric memory device, it is most important to develop a structure, and a method for manufacturing the same, with which memory cell capacitors can be integrated together without deteriorating the characteristics thereof. Particularly, a ferroelectric material used in a capacitance insulating film is a laminar oxide containing oxygen atoms therein, and is easily reduced in a hydrogen atmosphere used in subsequent manufacturing steps after forming the memory cell capacitors, thereby deteriorating the ferroelectric characteristics thereof.
For example, along with the miniaturization of semiconductor devices, a tungsten (W) deposition process by a CVD method has been widely employed for filling a contact hole having a large aspect ratio. The W deposition process is based on the reaction represented by Formula 1 below:
2WF
6
+3SiH
4
→2W+3SiF
4
+6H
2
  (1)
The reaction represented by Formula 1 above is performed in a very strong reducing atmosphere. Moreover, after the Al line formation, an annealing step is performed in a hydrogen-containing atmosphere in order to ensure the MOS transistor characteristics. The semiconductor device manufacturing process includes many other steps that generate, or use, hydrogen.
Hydrogen permeates through most of the materials used in a semiconductor device. Therefore, conventional ferroelectric memory devices have taken measures to prevent deterioration of the characteristics of memory cell capacitors during the manufacturing process, for example, by reducing the hydrogen generation or suppressing the reducing atmosphere in subsequent manufacturing steps after forming the memory cell capacitors, or by covering the memory cell capacitors with an insulative hydrogen barrier film. A conventional method for suppressing/preventing deterioration of the characteristics of memory cell capacitors during the manufacturing process by using a hydrogen barrier film will now be described as an example.
FIG. 16
is a cross-sectional view illustrating a first conventional memory cell
1000
designed so as to suppress/prevent deterioration of the characteristics of the memory cell capacitors during the manufacturing process.
The memory cell
1000
includes a MOS transistor Tr used as a memory cell transistor, and a memory cell capacitor C. The MOS transistor Tr includes a gate electrode
1
formed on a semiconductor substrate S, and high concentration impurity diffusion regions
2
. The MOS transistor Tr of a memory cell is electrically isolated from the MOS transistor Tr of another adjacent memory cell by a shallow trench isolation region (hereinafter referred to simply as “STI region”)
3
. A word line (not shown) is connected to the gate electrode
1
, and a bit line
4
is connected to one of the high concentration impurity diffusion regions
2
. A first insulative film
5
and a first hydrogen barrier film
8
are formed on the semiconductor substrate S with the MOS transistor Tr formed thereon.
The memory cell capacitor C includes a lower electrode
7
formed on the first hydrogen barrier film
8
, a capacitance insulating film
9
made of a ferroelectric material and formed on the lower electrode
7
, and an upper electrode
10
formed on the capacitance insulating film
9
. The lower electrode
7
is connected to the other one of the high concentration impurity diffusion regions
2
via a contact plug
6
running through the first insulative film
5
and the first hydrogen barrier film
8
.
A second hydrogen barrier film
11
is formed on the first hydrogen barrier film
8
and the memory cell capacitor C so as to cover the memory cell capacitor C, and a second insulative film
12
is formed on the second hydrogen barrier film
11
. The upper electrode
10
is connected to an Al line
14
via a contact plug
13
running through the second hydrogen barrier film
11
and the second insulative film
12
.
FIG. 17
is a cross-sectional view illustrating a second conventional memory cell
1100
designed so as to prevent deterioration of the characteristics of the memory cell capacitors during the manufacturing process.
The memory cell
1100
illustrated in
FIG. 17
has substantially the same structure as that of the first conventional memory cell
1000
illustrated in FIG.
16
. However, the memory cell
1100
is different from the first conventional memory cell
1000
in that the second hydrogen barrier film
11
is formed over the second insulative film
12
.
A CVD method or a sputtering method is typically used for depositing a hydrogen barrier film. However, a gas used in a CVD method often contains hydrogen and thus generates hydrogen or water during the deposition step, thereby deteriorating the capacitance insulating film, which is made of a ferroelectric material. In view of this, in the manufacturing process of such a conventional memory cell as described above, the second hydrogen barrier film
11
, which is formed in a step after the formation of the memory cell capacitor C, is formed by a sputtering method, which does not generate hydrogen during the deposition step, using a material such as Al
2
O
3
or TiN, for example.
However, in the first conventional memory cell
1000
illustrated in
FIG. 16
, the step coverage of the second hydrogen barrier film
11
is poor at an edge portion E of the memory cell capacitor C, as illustrated in FIG.
18
. This adversely influences the crystallinity/packing of the second hydrogen barrier film
11
at the edge portion E, thereby resulting in grain boundaries. Hydrogen having passed through the second insulative film
12
of the memory cell
1000
may intrude into the memory cell capacitor C through such grain boundaries. Such hydrogen deteriorates the capacitance insulating film
9
, which is made of a ferroelectric material.
In the second conventional memory cell
1100
illustrated in
FIG. 17
, when forming the contact plug
13
for connecting the Al line
14
and the upper electrode
10
to each other, hydrogen may intrude into the second insulative film
12
through the side wall of the connection hole in which the contact plug
13
is being formed. The hydrogen diffuses through the second insulative film
12
to reach and deteriorate the capacitance insulating film
9
, which is made of a ferroelectric material.
As described above, it is very difficult in the conventional memory cells to suppress/prevent deterioration of the capacitance insulating film, which is made of a ferroelectric material.
SUMMARY OF THE INVENTION
The present invention has been made to solve these problems in the prior art, and has an object to provide a semiconductor device including a reliable memory cell capacitor in which deterioration of the characteristics of the memory cell capacitor due to hydrogen or a reducing atmosphere is suppressed/prevented.
A semiconductor memory device of the present invention includes: a semiconductor substrate; a memory cell capacitor for storing data, including a first electrode provided above the semiconductor substrate, a capacitance insulating film formed on the first electrode, and a second electrode provided on the capacitance insulating film; a step reducing film covering an upper surface and a side surface of the memory cell capacitor; and an overlying hydrogen barrier film covering the step reducing film.
According to the present invention, the step reducing film for reducing the step at the edge portion of the memory cell capacitor is formed so as to cover the memory cell capacitor. Thus, the step coverage of the overlying hydrogen barrier film is improved.

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