Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-01-14
2004-06-08
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S401000
Reexamination Certificate
active
06747315
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor device having a MOS field-effect transistor (hereinafter abbreviated as MOSFET) such as a vertical-type power MOSFET or a double diffusion-type MOSFET. More particularly, the present invention relates to such a MOSFET that has a very short turn-ON/OFF time and an improved reverse withstanding voltage.
BACKGROUND ART
A driver circuit is frequently used which employs a vertical-type or double diffusion-type power MOSFET to drive an inductive load such as a motor. For example, the vertical-type power MOSFET has such a configuration, as shown in
FIG. 4
, that a P-well
21
is formed on the surface of an N-type semiconductor layer
20
provided on a N
+
-type semiconductor substrate
20
a
, and at an outer periphery of this P-well
21
is formed a ring-shaped N
+
-type source diffusion layer
22
. In this configuration, the semiconductor layer
20
outside the P-well
21
and the semiconductor substrate
20
a
act as a drain layer
23
.
The surface region of the P-well
21
between the drain layer
23
and the source layer
22
acts as a channel region
26
, on which is provided a gate electrode
28
with a gate insulator film
27
interposed therebetween. At the center of the P-well
21
is provided a P
+
-type region
25
for ohmic-contact such that a source electrode
33
may be connected to this P
+
-type region
25
and the source region
22
. The drain electrode
24
is provided on the back surface of the semiconductor substrate
20
a
. Thus, the vertical-type MOSFET is formed.
A PN junction of the P-well
21
and the N-type semiconductor layer
20
forms a so-called built-in diode (body diode). This built-in diode is structured so as to be connected in the reverse direction between the drain and the source and can be used as a flywheel diode for inducing a reverse recovery current ascribed to a counter electromotive force of an inductive load.
The counter electromotive force of the inductive load acts to apply a voltage in the forward direction on the built-in diode, which is accompanied, as well known, by accumulation of minority carrier, that is, electrons in the P-well. Thus accumulated minority carrier inhibits rapid interruption of the operation of the built-in diode at the time of rectification when the current is changed in flow direction. Moreover, if the flow of this minority carrier is concentrated to part of the device, the PN junction portion of the P-well and the drain layer is broken and hence the power MOSFET is broken eventually.
In view of the above, it is an object of the invention to provide a semiconductor device including a MOSFET that can solve these technological problems in providing high-speed switching operations of a built-in diode and improving the breakdown resistance amount (withstanding voltage).
DISCLOSURE OF THE INVENTION
A semiconductor device including a MOS field-effect transistor according to the present invention includes; a MOS field-effect transistor; and a diode which is built in the transistor and connected between a source electrode and a drain electrode thereof so that when a voltage in the reverse direction is applied between the source electrode and the drain electrode at the time of operation, which forms a current path between the source electrode and the drain electrode, wherein a contact portion of the diode with the source electrode has such a construction that a high-impurity concentration region having a second conductivity type which is a conductivity type of the source electrode side semiconductor layer of the diode, and a region having a first conductivity type opposite to the conductivity type or a low-impurity concentration region having the second conductivity type are formed alternately in a plan structure.
The “high-impurity concentration” of the high-impurity concentration region of the second conductivity type means such an impurity concentration as to form an ohmic contact with the source electrode.
By this construction, if a counter electromotive force is generated when an inductive load such as a motor connected to a circuit having a device of the present invention is turned OFF, a resultant voltage in the reverse direction applied between the drain and the source is cancelled by the built-in diode, after which the minority carrier remaining in the second conductivity type region is dropped into the first conductivity type region of the contact portion, thus enabling suppressing the accumulation of the minority carrier in the second conductivity type region. This mechanism enables rapidly not to make a working of the built-in diode. Also, since the minority carrier is not accumulated, a large current is not concentrated to part of the device at the time of rectification, thus enabling enhancing the withstanding voltage.
Specifically, this effect is remarkable especially when the MOS field-effect transistor is a double-diffusion type MOS field-effect transistor that has a first conductivity type semiconductor layer which provides a drain region, second conductivity type regions which are formed by diffusion in the first conductivity type semiconductor layer, and source regions having a first conductivity type formed by diffusion at an outer periphery of each of the second conductivity type regions in such a configuration that such portions of the second conductivity type regions which are positioned between each of the source regions and the drain region act as channel regions.
More specifically, the source electrode is provided so as to be in contact with each of the source regions and a surface portion of each of the second conductivity type regions opposite to each of the channel regions with respect to each of the source regions. Further, the second conductivity type regions are formed in a matrix in the first conductivity type semiconductor layer, each of the source regions is formed in a ring shape on a plan view in each of the second conductivity type regions so as to give a constant gap at the periphery of each of the second conductivity type regions, and also the source electrode is formed at a predetermined region of an inner circumference of each of the ring-shaped source regions and the entire inner surface of each of the second conductivity type regions, thus providing a mass-capacity power MOSFET.
Specifically, the contact portion has such a construction that a contact portion of each of the second conductivity type regions with the source electrode has such a construction that one or more first conductivity type high impurity-concentration regions each of which is ring shape on a plan view and one or more second conductivity type high impurity-concentration regions are provided alternately or that the second conductivity type regions have a low impurity concentration; and wherein a contact portion of each of the second conductivity type regions with the source electrode has such a construction that second conductivity type high impurity-concentration regions are evenly spaced in each of the second conductivity type regions.
REFERENCES:
patent: 6462378 (2002-10-01), Kim
patent: 2003/0067033 (2003-04-01), Kinoshita et al.
patent: 0 416 805 (1991-03-01), None
Arent & Fox PLLC
Cao Phat X.
Rohm & Co., Ltd.
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