Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2001-12-05
2004-08-31
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C438S014000, C438S201000
Reexamination Certificate
active
06784006
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-313939 filed on Oct. 11, 2001, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor device, a method of manufacturing such a semiconductor device, and a system for evaluating electrical characteristics of the semiconductor device. Particularly, the invention relates to a semiconductor device which is preferable to evaluating time-dependent degradations of electrical characteristics of a semiconductor element, a method of manufacturing such a semiconductor device, and an electrical characteristics evaluating system.
2. Description of the Related Art
It is well-known that a MOSFET (metal oxide semiconductor field effect transistor) such as a silicon element varies its electrical characteristics with time. Generally speaking, electrical characteristics of a semiconductor device become worse with a lapse of time. The semiconductor device is required to remain reliable for a long period of time like 10 or 20 years during the normal use. In other words, the semiconductor device should maintain its electrical characteristics within a product specification limit even when they are degraded during the use.
It is empirically known that degradations of electrical characteristics of the MOSFET are predictable by monitoring a substrate current. For example, refer to C. Hu et al. “Hot-Electron-Induced MOSFET Degradation-Model, Monitor and Improvement” (IEEE Transactions on Electron Devices, Vol. ED-32, 1985). This reference describes that degradations of electrical characteristics depend upon the substrate current as follows. Some hot carriers which are given energy by a electric field tend to damage a gate insulated film or the like, form levels in an interface of the gate insulated film, and are trapped in the gate insulated film, thereby degrading electrical characteristics of the semiconductor element.
Further, hot carriers in a semiconductor substrate cause impact ionization therein. Then, electron hole pairs will be generated. Charges which are opposite to those constituting a channel flow through the semiconductor substrate as a substrate current. For instance, in the case of an n-channel conductivity type MOSFET, charges constituting the channel are electrons, so that the holes flow through the semiconductor substrate as a substrate current. In short, the degradations of electrical characteristics and the substrate current are caused by the carriers of the high energy condition in the MOSFET. For this reason, it is predictable that the degradations of electrical characteristics of the MOSFET and the substrate current are correlated. The relation has been empirically established between the degradations of electrical characteristics and the substrate current. Therefore, it is possible to predict the degraded electrical characteristics of the MOSFET by monitoring the substrate current.
Generally, semiconductor elements whose electrical characteristics extensively degrade during the initial stage of use tend to maintain the initially degraded state. Conversely, semiconductor elements having excellent electrical characteristics at the initial stage, i.e. semiconductor elements having a high current value, tend to extensively degrade during the use because they tend to have the carriers of the high energy condition. In other words, initial electrical characteristics and degradation resistance are contradictory with each other. It is natural to manufacture semiconductor devices having excellent initial electrical characteristics taking the degradation resistance into consideration. Such semiconductor devices should have electrical characteristics defined by their specification with respect to the lifetime expectancy. In short, if a semiconductor device has excessively long life, it means that its electrical characteristics may be sacrificed.
It is therefore very important to evaluate the degradations of electrical characteristics when manufacturing semiconductor devices. The degradations of electrical characteristics of the semiconductor device are evaluated by monitoring the degradation of electrical characteristics when stress of direct current (DC stress) is applied to a semiconductor element. For instance, the degradations of electrical characteristics after an electronic circuit is assumed to be used for ten years are evaluated as follows. A dynamic stress which varies with time is primarily applied to a semiconductor element for constituting an electronic circuit. The degradations of electrical characteristics are evaluated assuming that a half of the whole DC stress for ten years is applied to the semiconductor element (The approach of “duty factor”.), and that electrical characteristics of the semiconductor element are degraded to a level in which the DC stress has been applied for five years. This evaluation is performed on the basis of the degradation of electrical characteristics due to the DC stress although the dynamic stress is primarily applied to the semiconductor element. Therefore, the foregoing evaluation method cannot be always precise.
On the contrary, the BERT (Berkeley Reliability Tool) developed by University of California at Berkeley, U.S.A. uses the circuit simulation technique in order to reliably evaluate the degradations of electrical characteristics of a semiconductor device as described hereinafter.
First of all, a dynamic circuit simulation is performed for a semiconductor element which is free from any degradation of electrical characteristics. A substrate current or the like of the semiconductor element which constitutes a circuit and is in a dynamic state is calculated as a function of time. For instance, the degradations of electrical characteristics of the semiconductor element in a certain time period are evaluated on the basis of the relationship between a time integral of physical quantities including a calculated substrate current I
sub
(t), and an empirically created relationship between the substrate current and degradations of electrical characteristics.
(
I
sub
(
t
)
Id
(
t
)
)
α
Id
(
t
)
β
where Id denotes a drain current, and &agr; and &bgr; denote model parameters.
Degraded electrical characteristics of the circuit are evaluated on the basis of degradations of electrical characteristics of the semiconductor element derived using the foregoing process.
This method is effective in evaluating the degraded electrical characteristics of the semiconductor element taking dynamic stresses into consideration, and is more reliable than the evaluation method using the DC stress.
However, the foregoing evaluation methods seem to have the following problems.
(1) In the foregoing circuit simulation, the influence of the semiconductor element which constitutes a circuit in operation and is in non-equilibrium cannot be precisely taken into consideration. For instance, it is well-known that carrier energies in a semiconductor element are in non-equilibrium in the following semiconductor elements: a semiconductor element whose channel length is short compared with an mean free path of carriers; a semiconductor element in which an electric field varies very steeply; a semiconductor element to which a voltage is applied and in which an electric field steeply varies with time, or the like. The electrical characteristics of such semiconductor elements cannot be precisely evaluated through the circuit simulation, and a substrate current cannot be correctly calculated. Therefore, the degradations of electrical characteristics cannot be precisely evaluated.
(2) In a semiconductor device in which polycrystalline silicon is used as a semiconductor active region and a semiconductor element is formed in the semiconductor active region, carriers in the semiconductor active region have short lifetimes. In other words, electron hole pairs caused by impact ionization are excessive
Enda Toshiyuki
Tanimoto Hiroyoshi
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Perkins Pamela E
Zarabian Amir
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