Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-01-03
2004-12-14
Nguyen, Tuan H. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S309000, C257S310000
Reexamination Certificate
active
06831323
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to semiconductor devices including capacitors, especially capacitors in which ferroelectrics or high-&kgr; materials are used for capacitive insulating films, and methods for fabricating the same.
Ferroelectrics or high-&kgr; materials exhibit remanent polarization due to hysteresis properties or high relative dielectric constants. Thus, in the field of nonvolatile memories or DRAM devices, the ferroelectrics or the high-&kgr; materials can substitute for silicon oxide or silicon nitride used for capacitive insulating films included in capacitors of semiconductor devices.
Hereinafter, a known method for fabricating a semiconductor device including a capacitor in which a ferroelectric or a high-&kgr; material is used for a capacitive insulating film will be described with reference to the drawings.
First, as shown in
FIG. 19A
, a transistor region
103
is defined by an isolation film
102
selectively formed in a semiconductor substrate
101
of silicon. Thereafter, an MOS transistor
104
is formed in the transistor region
103
.
Next, as shown in
FIG. 19B
, a first interlevel dielectric film
105
of silicon dioxide is deposited, and then the surface thereof is planarized. Thereafter, a lower-electrode formation film of platinum is deposited by a sputtering process on the planarized first interlevel dielectric film
105
. Subsequently, a ferroelectric film containing strontium, bismuth, tantalum and the like is formed by a spin-on process on the lower-electrode formation film. After the ferroelectric film has been crystallized, an upper-electrode formation film of platinum is deposited by a sputtering process on the ferroelectric film. Thereafter, the upper-electrode formation film, the ferroelectric film and the lower-electrode formation film are dry-etched in this order, thereby forming a lower electrode
106
, a capacitive insulating film
107
and an upper electrode
108
out of the lower-electrode formation film, the ferroelectric film and the upper-electrode formation film, respectively, on part of the interlevel dielectric film
105
located over the isolation film
102
. In this manner, a capacitor
109
made of the lower electrode
106
, the capacitive insulating film
107
and the upper electrode
108
is formed.
Then, as shown in
FIG. 19C
, a second interlevel dielectric film
110
of silicon dioxide is deposited over the entire surface of the semiconductor substrate
101
. Thereafter, a first contact hole
110
a
for exposing the upper electrode
108
therein and a second contact hole
110
b
for exposing a doped region of the MOS transistor
104
therein are formed in the second interlevel dielectric film
110
.
Then, as shown in
FIG. 19D
, a metal film containing aluminum as a main component is deposited over the entire surface of the second interlevel dielectric film
110
including the contact holes
110
a
and
110
b
. The metal film is patterned, thereby forming a wiring
111
out of the metal film. Thereafter, another wiring layer and a passivation film, for example, are formed.
In the known method for fabricating a semiconductor device, however, the capacitor
109
is formed over the isolation film
102
adjacent to the transistor region
103
.
In addition, since the capacitor
109
extends along the principal surface of the semiconductor substrate
101
, i.e., has a so-called planar structure, the projected area of the capacitor
109
onto the substrate surface that is enough to ensure a required capacitance is large, resulting in the extremely small effect of reducing a wiring rule for the MOS transistor
104
and the wiring
111
.
Therefore, especially the semiconductor device including the capacitor
109
in which a ferroelectric or a high-&kgr; material is used for the capacitive insulating film
107
has a problem that the area of each capacitor, specifically the area of each cell in a semiconductor memory, cannot be reduced.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to reduce the area of each capacitor in a semiconductor device including a capacitor.
In order to achieve this object, according to the present invention, an oxygen barrier film, a lower electrode and a capacitive insulating film are stacked over a conductive plug, and in addition, the capacitive insulating film has a bent portion that extends along the direction of penetration of the conductive plug.
Specifically, a first inventive semiconductor device includes: a conductive plug formed through an insulating film; a conductive oxygen barrier film formed on the insulating film so as to be electrically connected to the conductive plug and to cover the conductive plug; a lower electrode formed on the oxygen barrier film and connected to the oxygen barrier film; a capacitive insulating film formed on the lower electrode, following the lower electrode; and an upper electrode formed on the capacitive insulating film, following the capacitive insulating film. The capacitive insulating film has a bent portion that extends along the direction in which the conductive plug penetrates through the insulating film.
In the first inventive semiconductor device, the capacitor made of the lower electrode, the capacitive insulating film and the upper electrode is formed over a transistor with the conductive plug sandwiched therebetween. Thus, the unit area of a cell constituted by the capacitor and the transistor is reduced. In addition, since the capacitive insulating film has the bent portion that extends along the direction of penetration of the conductive plug, the capacitive insulating film has a face substantially perpendicular to the substrate surface. Accordingly, the projected area of the capacitive insulating film onto the substrate surface is reduced, thus further reducing the cell area. Moreover, since the oxygen barrier film is interposed between the lower electrode and the conductive plug, the conductive plug is not oxidized by oxygen atoms constituting the capacitive insulating film.
A second inventive semiconductor device includes: a conductive plug formed through a first interlevel dielectric film formed on a substrate; a conductive oxygen barrier film formed on the first interlevel dielectric film so as to be electrically connected to the conductive plug and to cover the conductive plug; a second interlevel dielectric film formed on the first interlevel dielectric film and having an opening in which the oxygen barrier film is exposed; a lower electrode formed to follow bottom and wall surfaces of the opening formed in the second interlevel dielectric film and to be connected to the oxygen barrier film; a capacitive insulating film formed on the lower electrode, following the lower electrode; and an upper electrode formed on the capacitive insulating film, following the capacitive insulating film. The capacitive insulating film has contiguous portions located over the bottom and wall surfaces of the opening, respectively, to form a U-bent portion that extends along the direction in which the conductive plug penetrates through the first interlevel dielectric film.
In the second inventive semiconductor device, the lower electrode is formed to follow the bottom and wall surfaces of the opening formed in the second interlevel dielectric film. Thus, a U-bent portion extending along the direction of penetration of the conductive plug is formed in contiguous portions located over the wall and bottom surfaces of the opening. Accordingly, the capacitive insulating film has a face substantially perpendicular to the substrate surface. As a result, the same effect as in the first inventive semiconductor device is obtained.
The second inventive semiconductor device may include an adhesion layer that enhances the adhesion of the lower electrode to the second interlevel dielectric film and is interposed between the bottom surface of the opening and the lower electrode and between the wall surface of the opening and the lower electrode.
Alternatively, the second inventive semiconductor device may include an
Fujii Eiji
Ito Toyoji
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
Nguyen Tuan H.
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