Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Implanting to form insulator
Reexamination Certificate
2002-04-10
2004-11-02
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Implanting to form insulator
C438S528000, C438S530000, C438S795000
Reexamination Certificate
active
06812114
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to silicon-on-insulator (SOI) substrates for semiconductor integrated circuits (ICs), and more particularly to a method of fabricating an SOI substrate which includes an ultra-thin top Si-containing layer (on the order of about 2000 Å or less) and at least one patterned buried semi-insulating or insulating region such as a buried oxide (BOX) region which has well defined edges that are suitable for sub-micron geometries.
BACKGROUND OF THE INVENTION
Separation by implantation of oxygen (SIMOX) is a technique employed in the semiconductor industry in fabricating SOI substrates that can be used in the manufacturing of ICs. SIMOX typically involves using high-energy ions to implant a large dose of oxygen ions beneath the surface of a bulk Si-containing wafer. Upon high-temperature annealing, the implanted oxygen ions form a continuous BOX region which electrically isolates the Si at the surface (i.e., top or superfacial Si layer). Typically, prior art SIMOX processes have been used to fabricate SOIs with a top Si layer and a BOX thickness of several thousand angstroms.
In some applications, it is desirable to form discrete and isolated BOX regions within a Si-containing substrate while not forming BOX regions in other portions of the same Si-containing substrate. Hence, there is a growing need for providing patterned SOI regions. Patterned SOI regions formed within a Si-containing substrate are especially needed for future high performance Si-containing ICs, optical communication devices and three-dimensional device and circuit integration.
Despite this need, there are many challenges in fabricating patterned SOI regions within a Si-containing substrate. For example, the following criteria needs to be met:
(i) maintaining a smooth surface topology between the patterned and unpatterned regions;
(ii) controlling and eliminating crystallographic defects at the edge of the mask used during ion implantation to create patterned regions; and
(iii) controlling and eliminating crystal defects between the nearby buried oxide islands.
In addition to the above criteria, it is necessary for future generation of ICs to provide SOI substrates that have very fine geometries (on the order of a micron or less) associated therewith. In particular, fine geometries are needed in some applications especially in instances wherein the buried oxide region is employed as a diffusion barrier for most dopants in Si. A BOX region under a gate and extension regions of a field effect transistor (FET) also suppresses the infringing field from the drain region during high operating voltages.
In view of the above, there is a continued need for providing a new and improved method of fabricating SOI substrates that have at least one patterned buried semi-insulating or insulating region which has well defined edges that are suitable for sub-micron geometries.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a method of forming at least one patterned buried semi-insulating or insulating region, i.e., at least one discrete and isolated semi-insulating or insulating island, within a Si-containing substrate.
Another object of the present invention is to provide a method of forming at least one patterned buried semi-insulating or insulating region within a Si-containing substrate wherein the at least one patterned buried semi-insulating or insulating region has well defined edges that are suitable for sub-micron geometries. The term “well defined” is used herein to denote a buried semi-insulating or insulating region whose edges are substantially regular shaped and free of crystal defects.
A further object of the present invention is to provide a method of forming at least one patterned buried semi-insulating or insulating region within a Si-containing substrate wherein the method essentially controls and eliminates crystal defects between nearby buried semi-insulating or insulating islands, e.g., between discrete buried oxide (BOX) regions.
A still further object of the present invention is to provide a method of forming an SOI substrate having at least one patterned buried semi-insulating or insulating region which extends the scalability of complementary metal oxide semiconductor (CMOS) devices to less than 0.1 micron channel lengths.
An even further object of the present invention is to provide a method of forming an SOI substrate having an ultra-thin top Si-containing layer. The term “ultra-thin” as used in conjunction with the top Si-containing layer of the SOI substrate denotes a layer having a thickness of about 2000 Å or less, with a thickness of from about 100 to about 500 Å being more highly preferred.
An additional object of the present invention is to provide a method of forming an SOI substrate which includes an ultra-thin top Si-containing layer as well as a thin patterned buried semi-insulating or insulating region which has a thickness of about 4000 Å or less, with a thickness of from about 10 to about 1500 Å being more highly preferred.
These and other objects and advantages are achieved in the present invention by utilizing a method wherein the ultra-thin top Si-containing layer and the at least one patterned buried semi-insulating or insulating region are formed utilizing various ion implantation steps which include at least one ion implantation step that selectively annihilates portions of a previously formed buried semi-insulating or insulating region.
In accordance with the present invention, the ion implantation step that selectively annihilates portions of a previously formed buried semi-insulating or insulating region comprises the use of ions that are non-soluble in the previously formed buried semi-insulating or insulating region. The non-soluble ions function to create heavily damaged or amorphous regions within selective portions of the previously formed buried semi-insulating or insulating region. Upon annealing, a buried oxide region forms in implanted regions that do not include the non-soluble ions, whereas recrystallization occurs in implanted regions which include the non-soluble ions.
In broad terms the inventive method comprises the steps of:
implanting first ions into a surface of a Si-containing substrate so as to form a first implant region of said first ions in said Si-containing substrate;
first annealing said Si-containing substrate containing said first implant region so as to convert said first implant region into a buried semi-insulating or insulating region;
selectively implanting second ions into at least portions of said buried semi-insulating or insulating region, said second ions are insoluble in said buried semi-insulating or insulating region; and
second annealing said Si-containing substrate so as to recrystallize said buried semi-insulating or insulating region that includes said second ions.
In one embodiment, the method of the present invention comprises the steps of:
implanting first ions into a surface of a Si-containing substrate so as to form a first implant region of said first ions in said Si-containing substrate;
first annealing said Si-containing substrate containing said first implant region so as to convert said first implant region into a buried semi-insulating or insulating region;
forming a patterned mask on said surface of said Si-containing substrate;
implanting second ions into at least portions of said buried semi-insulating or insulating region not protected by said patterned mask, said second ions are insoluble in said buried semi-insulating or insulating region;
removing said patterned mask; and
second annealing said Si-containing substrate so as to recrystallize said buried semi-insulating or insulating region that includes said second ions.
In another embodiment, the method of the present invention comprises the steps of:
implanting first ions into a surface of a Si-containing substrate so as to form a first implant region of said first ions in said Si-containing substrate;
first annealing said Si-containing substrate containing said f
Chen Tze-chiang
Sadana Devendra K.
International Business Machines - Corporation
Niebling John F.
Roman Angel
Scully Scott Murphy & Presser
Trepp, Esq. Robert M.
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