Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-07-14
2004-08-24
Nguyen, Tuan H. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S369000, C257S413000, C257S616000
Reexamination Certificate
active
06781168
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and especially to a transistor that is capable of inhibiting an increase in leakage current in a gate insulating film.
2. Description of the Background Art
One example of the well-known transistors used in semiconductor devices is a MISFET (Metal-Insulator-Semiconductor Field Effect Transistor). An n-channel MISFET is configured such that source and drain regions doped with n-type impurities are formed on a p-type Si substrate, and a gate insulating film and an n-type Si crystal film for gate electrode applications are formed in this order in layers on the p-type Si substrate between the source and drain regions.
The operation of this n-channel MISFET is described hereinbelow. First, the p-type Si substrate is grounded and a positive threshold potential is applied to the gate electrode. Then, a potential difference is produced between the source and drain regions to cause the flow of drain current. This state is the ON state of the n-channel MISFET. Next, the p-type Si substrate is grounded and a negative potential is applied to the gate electrode. In this case, even if a potential difference is produced between the source and drain regions, no drain current flows because a channel region is shut off. This state is the OFF state of the n-channel MISFET.
With higher integration of semiconductor devices, the element cell size is shrinking. When the n-channel MISFET is in the OFF state, the application of a 0 volt potential to the gate electrode cannot shut off the drain current due to punch-through phenomena occurring between the source and drain regions. That is, the drain current can only be shut off by the application of a negative potential.
However, applying a negative potential to the gate electrode produces a potential difference between the gate electrode and the drain region. This potential difference causes an increase in leakage current flowing between the gate electrode and the drain region through the gate insulating film. The increased leakage current has the problems of degrading the transistor characteristics of the n-channel MISFET and affecting circuit operation of the n-channel MISFET.
In Japanese Patent Application Laid-open No. 6-120501 (1994) (pp. 2-4, FIGS. 1-5), an n-type polycrystalline silicon layer and a p-type polycrystalline silicon layer are formed in layers on an oxide silicon film which makes a gate insulating film, and then patterned to form a gate electrode. Thus, at a gate voltage within its operating range, drain current dependent on the gate voltage is observed; while, at a gate voltage outside its operating range, drain current is almost constant independently of the gate voltage. This inhibits an increase in leakage current.
In recent years, however, semiconductor device manufacturing is moving toward even higher integration and the element cell size is further shrinking. Thus, it is impossible to satisfactorily inhibit an increase in leakage current by only forming the gate electrode from n-type and p-type polycrystalline silicon layers which are stacked one above the other. Besides, the gate electrode formed of polycrystalline silicon has high electric resistance and thus, can reduce the operating speed of the transistor.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device including a transistor that is capable of further inhibiting an increase in leakage current flowing between the gate electrode and the drain through a gate insulating film.
According to an aspect of the present invention, the semiconductor device includes a p-type semiconductor substrate, an n-type source region, an n-type drain region, a gate insulating film, a first film, and a second film. The n-type source region and the n-type drain region are formed in the p-type semiconductor substrate. The gate insulating film is formed on the p-type semiconductor substrate sandwiched between the n-type source region and the n-type drain region. The first film is of n-type Ge semiconductor or n-type SiGe mixed crystal semiconductor formed in a layer on the gate insulating film. The second film is of p-type Ge semiconductor or p-type SiGe mixed crystal semiconductor formed in a layer on the first film, forming a gate electrode with the first film.
The semiconductor device according to the present invention, as compared with conventional n-channel transistors, has the effect of further inhibiting an increase in leakage current flowing between the gate electrode and the drain through the gate insulating film. It also has the effect of speeding up drive of the n-channel transistor.
According to another aspect of the present invention, the semiconductor device includes an n-type semiconductor substrate, a p-type source region, a p-type drain region, a gate insulating film, a first film, and a second film. The p-type source region and the p-type drain region are formed in the n-type semiconductor substrate. The gate insulating film is formed on the n-type semiconductor substrate sandwiched between the p-type source region and the p-type drain region. The first film is of p-type Ge semiconductor or p-type SiGe mixed crystal semiconductor formed in a layer on the gate insulating film. The second film is of n-type Ge semiconductor or n-type SiGe mixed crystal semiconductor formed in a layer on the first film, and forms a gate electrode with the first film.
The semiconductor device according to the present invention, as compared with conventional p-channel transistors, has the effect of further inhibiting an increase in leakage current flowing between the gate electrode and the drain through the gate insulating film. It also has the effect of speeding up drive of the p-channel transistor.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 6362055 (2002-03-01), Lin et al.
patent: 2003/0132506 (2003-07-01), Rhee et al.
patent: 2004/0012055 (2004-01-01), Rhee et al.
patent: 4-142080 (1992-05-01), None
patent: 6-120501 (1994-04-01), None
Nguyen Tuan H.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Renesas Technology Corp.
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