Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated – With heat sink embedded in encapsulant
Reexamination Certificate
2001-10-23
2004-08-17
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
With heat sink embedded in encapsulant
C257S730000, C257S704000, C257S706000, C257S787000
Reexamination Certificate
active
06777819
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor packages, and more particularly, to a semiconductor package used as a multi-media card (MMC).
BACKGROUND OF THE INVENTION
Illustrated in
FIG. 9
is a semiconductor package miniaturized in profile and currently used as a multi-media card (MMC) as disclosed in U.S. Pat. No. 6,040,622. In the semiconductor package
1
, on a front side
100
of a substrate
10
there are mounted at least one memory chip
11
and at least one passive device
12
(only one of each is illustrated in the drawing respectively), both of which are electrically connected to the substrate
10
; whereas on a back side
101
of the substrate
10
there are formed a plurality of connecting terminals
102
for electrically connecting the memory chip
11
and passive device
12
to an external device. The semiconductor package
1
further includes an encapsulant
13
for encapsulating the memory chip
11
, the passive device
12
and the substrate
10
in a manner that, the back side
101
and the connecting terminals
102
of the substrate
10
are exposed to outside of the encapsulant
13
to be in direct contact with the atmosphere.
Furthermore, during a molding process, the substrate
10
having the memory chip
11
and passive device
12
is clamped between an upper mold
140
and a lower mold
141
of a mold
14
, as shown in FIG.
10
. Prior to molding, since the portion of the substrate
10
which is arranged to be exposed to outside of the encapsulant
13
is not clamped by the mold
14
, the substrate
10
is adsorbed with vacuum onto the lower mold
141
through a via
141
a
formed in the lower mold
141
in a manner that, the back side
101
of the substrate
10
closely abuts the lower mold
141
, so as to prevent a molding resin from flashing on the back side
101
or the connecting terminals
102
of the substrate
10
during molding.
However, several drawbacks are generated in the foregoing semiconductor package
1
. First, the foregoing vacuum adsorption can not be applied to a conventional mold, and a specific mold having a vacuum adsorption function used herein is more expensive than the conventional mold, thereby making complexity and costs in fabrication both increased. Furthermore, the semiconductor package
1
encapsulates relatively more electronic and semiconductor components, and accordingly generates more heat during operation than a semiconductor package merely encapsulating a single semiconductor chip; this causes a problem of how to effectively dissipate the heat for the semiconductor package
1
. In addition, as more electronic and semiconductor components are encapsulated in the semiconductor package
1
, electronic performance of the semiconductor package
1
may be easily affected by external electromagnetic interference (EMI) detrimentally.
SUMMARY OF THE INVENTION
A primary objective of the present invention is to provide a semiconductor package with a flash-proof device, in which a molding resin can be effectively prevented from flashing on a back side of a substrate, and heat dissipating efficiency is significantly improved, as well as electricity and reliability of the semiconductor package can be assured.
According to the above and other objectives, the semiconductor package of the invention includes: a substrate having a first side for disposing a plurality of conductive traces thereon, and a second side for forming a plurality of electrical connection terminals thereon; at least one chip attached to the first side of the substrate and electrically connected to the substrate; at least one passive device attached to the first side of the substrate and electrically connected to the substrate; a flash-proof device attached to the first side of the substrate for forming a space for receiving the chip and the passive device therein; and an encapsulant for encapsulating the chip, the passive device, the flash-proof device and the substrate in a manner that, a top side of the flash-proof device is exposed to outside of the encapsulant; wherein a height between the top side of the flash-proof device and the first side of the substrate is slightly greater than a depth of a molding cavity of a mold used for forming the encapsulant in a molding process.
REFERENCES:
patent: 5530295 (1996-06-01), Mehr
patent: 5812570 (1998-09-01), Spaeth
patent: 6069027 (2000-05-01), Mertol et al.
patent: 6191360 (2001-02-01), Tao et al.
patent: 6294831 (2001-09-01), Shishido et al.
patent: 6392900 (2002-05-01), Petty et al.
Corless Peter F.
Edwards & Angell LLP
Jensen Steven M.
Nguyen DiLinh
Pham Long
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