Differential memory interface system

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S080000, C326S083000

Reexamination Certificate

active

06747483

ABSTRACT:

TECHNICAL FIELD
An embodiment of the invention relates to communication between semiconductor devices and more particularly, to systems for transferring data over a differential memory interface.
BACKGROUND INFORMATION
Applications that require memory must interface with the memory in order to store and retrieve data. For instance, in Personal Computers (PCs) and workstations, a control unit located in a memory control hub (MCH) communicates with a memory unit by sending and receiving data signals over a bus. If large amounts of memory are required, one or more memory units are placed on a memory module such as a Single In-line Memory Module (SIMM) or a Dual In-line Memory Module (DIMM). The MCH can be placed on the module as well, if not then the modules are connected to an external bus in order to communicate with the MCH.
A multi-drop bus is a typical bus configuration used for interfacing between a memory module and the MCH. In a multi-drop bus architecture, a master device, such as an MCH, communicates over a bus by addressing one or more slave devices, such as a memory unit or memory module. Typically, a multi-drop bus will have one communication port for each coupled memory unit or module. The communication port will generally include address, data, command and side-band pins for communication between the MCH and the memory units or modules. However, the numerous connections on the multi-drop bus create signal reflections within the bus, so effort is required to minimize the reflections, since reflections can impede proper data transfer over the bus.
There are many types of memory units available. One of the more common types of memory unit is a Dynamic Random Access Memory (DRAM) unit, of which there are also many varieties. It is generally a goal to increase the amount of memory in a PC or workstation without increasing the amount of space taken up by the memory. As a result, DRAM units are typically pin-limited or, in other words, the DRAM packaging constraints and size constraints of the environment only allow for external connections to a certain number of DRAM signal pins. Due to the pin limitations, the DRAM units can generally only support a single-ended interface, as opposed to a differential interface. This is because the single-ended interface only requires one external pin connection to transfer a data signal.
Another concern in memory interfaces is power consumption, which grows as the amount of memory in the interface system increases. When devices consume power, they generate heat and as the power consumption grows, more hardware is needed to dissipate the heat. This becomes especially difficult as operating frequencies rise.


REFERENCES:
patent: 5977796 (1999-11-01), Babara
patent: 6262598 (2001-07-01), Cairns et al.
patent: 6323698 (2001-11-01), Fletch

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