Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-08-01
2004-08-24
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S288000, C257S368000, C438S197000, C438S208000, C438S220000
Reexamination Certificate
active
06781206
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device provided with a diode.
2. Description of the Background Art
A substrate diode for controlling current is applied in a bridge output stage of a junction isolation type IC (Integrated Circuit) for controlling a motor. A conventional semiconductor device provided with such a substrate diode is described as follows.
An N-type island region for output, in which an output transistor is formed and to which a load, such as a motor, is connected, is formed at a P
−
substrate as described above in an application wherein a load current is allowed to freewheel. This N-type island region for output is biased to a negative voltage at the time of freewheel operation and, thereby, the junction between the N-type island region for output and the P
−
substrate becomes of a forward bias condition so that electrons are injected from the N-type island region for output to the P
−
substrate.
Electrons are injected into the P
−
substrate and, thereby, a parasitic NPN transistor existing between a passive N-type island region, formed at the P
−
substrate and forming a portion of another control circuit, and the N-type island region for output starts to operate.
Therefore, in addition to a current that becomes the main current flowing from the N-type island region for output toward a peripheral anode region formed at the P
−
substrate, an unnecessary current flows from the N-type island region for output to the passive N-type island region. As a result, the semiconductor device in some cases causes a malfunction.
Concerning such a malfunction, a technique for suppressing such an unnecessary current is reported in, for example, the reference, (O. Gonnard et al., “Multi-ring Active Analogic Protection for Minority Carrier Injection Suppression in Smart Power Technology”, ISPSD2001, pp. 351-354).
That is to say, a technique wherein a predetermined P-type isolation region and a dummy N-type island region are provided in a region of the P
−
substrate located between the N-type island region for output and the passive N-type island region and this P-type isolation region and the dummy N-type island region are short circuited by an aluminum wire is considered effective for suppressing the unnecessary current.
Here, a semiconductor device wherein this technique is adopted is concretely described. As shown in
FIG. 10
, a peripheral anode
104
a
, an N-type island region
107
a
for output and passive N-type island region
107
b
, respectively, are formed at a distance from each other in one of the main surfaces of a P
−
substrate
101
.
A load
114
, such as a motor, is connected to N-type island region
107
a
for output. A substrate diode is formed of P
−
substrate
101
and N-type island region
107
a
for output. Passive N-type island region
107
b
becomes a portion of another control circuit formed at P
−
substrate
101
, for example, a collector of an NPN transistor.
Here, N-type island region
107
a
for output is formed of a buried N
+
floating collector region
105
a
and an N well
106
a
while passive N-type island region
107
b
is formed of a buried N
+
floating collector region
105
b
and an N well
106
b.
In addition, isolation regions
104
b
and
104
c
connected to P
−
substrate
101
are formed at a region of P
−
substrate
101
located between N-type island region
107
a
for output and passive N-type island region
107
b.
Furthermore, a similar isolation region
104
a
is formed at a region of P
−
substrate
101
on the side of N-type island region
107
a
for output opposite to the side wherein passive N-type island region
107
b
is located. This isolation region
104
a
forms a peripheral anode. Here, isolation regions
104
a
,
104
b
and
104
c
, respectively, are formed of P
+
regions
102
a
to
102
c
and P wells
103
a
to
103
c.
On the other hand, a P substrate anode
115
is formed at the other main surface of P
−
substrate
101
. A load current (main current) flows through isolation region (peripheral anode)
104
a
and P substrate anode
115
at the time of freewheel operation.
N
−
epitaxial regions
108
, of which the impurity concentration is comparatively low, are formed at a region located between N-type island region
107
a
for output and isolation region
104
c
, at a region located between passive N-type island region
107
b
and isolation region
104
b
, and the like, in order to attain a necessary withstand voltage.
In the semiconductor device shown in
FIG. 10
, two isolation regions
104
b
and
104
c
are provided at a region between N-type island region
107
a
for output and passive N-type island region
107
b
and, furthermore, a dummy N-type island region
107
c
is formed at a region located between these two isolation regions
104
b
and
104
c
. Dummy N-type island region
107
c
is formed of a buried N
+
floating collector region
105
c
and an N well
106
c.
Dummy N-type island region
107
c
and isolation region
104
b
, which is located on the side of this dummy N-type island region
107
c
on which passive N-type island region
107
b
is located, are electrically short circuited via an aluminum wire
112
.
In the above described semiconductor device, electrons are injected from N-type island region
107
a
for output toward P
−
substrate
101
under the condition wherein the voltage of N-type island region
107
a
for output is negative (negative bias) so that electrons are stored in P
−
substrate
101
.
The stored electrons tend to diffuse toward passive N-type island region
107
b
. At this time, dummy N-type island region
107
c
is electrically short circuited to isolation region
104
b
, which is electrically connected to P
−
substrate
101
, and, thereby, the voltage of dummy N-type island region
107
c
becomes higher than the voltage of isolation region
104
b
. That is to say, the potential of dummy N-type island region
107
c
becomes higher than the potential of isolation region
104
b.
Thereby, the stored electrons are captured by dummy N-type island region
107
c
so that the tendency of the electrons to diffuse toward passive N-type island region
107
b
is restricted.
As a result, little current flows from passive N-type island region
107
b
toward N-type island region
107
a
for output and the main current flows as shown by solid line
200
from the peripheral anode (isolation region
104
b
) toward N-type island region
107
a
for output.
Thus, in the conventional semiconductor device, the tendency of the current to flow from passive N-type island region
107
b
toward N-type island region
107
a
for output is restricted so that malfunctions that accompany the current are prevented in the condition wherein the voltage of N-type island region
107
a
for output is negative.
However, the following problem arises in the conventional semiconductor device. The results of device simulations carried out on the structure of the semiconductor device shown in
FIG. 10
are shown in
FIGS. 11 and 12
, respectively.
FIG. 11
shows the waveform of current Ie that flows through N-type island region
107
a
for output and the waveform of current Ic that flows through passive N-type island region
107
b
, respectively, in the case that voltage Ve of N-type island region
107
a
for output is switched to positive, to negative and to positive in sequence over a period of time, as shown in FIG.
12
.
FIG. 12
shows the waveform of voltage Ve that is applied to N-type island region
107
a
for output, the waveform of voltage Vsal of aluminum wire
112
and the waveform of voltage Vb of the peripheral anode (isolation region
104
a
), respectively.
Here, in this device simulation, an external resistor corresponding to load
114
is added between N-type island region
107
a
for output and the bias power supply while an external register co
Flynn Nathan J.
McDermott & Will & Emery
Renesas Technology Corp.
Wilson Scott R.
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