Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2001-08-03
2004-10-26
Vital, Pierre M. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S112000, C711S162000, C707S793000
Reexamination Certificate
active
06810469
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application is related to claims priority from Japanese Application No. 2000-355636, filed Nov. 17, 2000.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a storage system connected to a host CPU and more specifically to a storage system connected to a host CPU for writing data received from the host CPU into another storage system.
2. Description of the Prior Art
As a method for holding data used in a host CPU in a plurality of external storage device units, there is generally employed a method comprising providing source and target external storage device units holding the same data below different external storage controller units, connecting the external storage controller units not through a host CPU, and issuing by the source external storage controller unit a write request in the source external storage controller unit received from the host CPU to the target external storage controller unit so as to coincide data of the source and target external storage device units.
In this case, when the source external storage controller unit issues the write request to the target external storage controller unit, in order to identify transfer to the target external storage controller unit, a device number (a number or identifier for identifying a target logical volume) used when the host CPU issues the write request into the external storage device unit is employed directly.
On the other hand, with an increase in data processing amount in recent years, data write performance to a source external storage device unit has been required to be improved to a write request from a host CPU. As a technique related to this, there is means for performing a plurality of input/output processes to one device at the same time. Only one input/output process to one device is performed originally, and thus, a plurality of input/output processes cannot be done at the same time. Here, a device number different from the original device number is used to one device which becomes apparently a device virtually different to the write request issuer, thereby realizing multiple processing to one device.
Corresponding to the multiple processing, when the source external storage controller unit issues a write request to the target external storage device unit, a device number different from the original device number is used directly.
SUMMARY OF THE INVENTION
In the above-mentioned prior art, data input/output processing for each device is a conventionally used method by an input/output interface with the OS of a host CPU. Thus, it is effective in an aspect of holding compatibility between the source and target external storage controller units.
However, since a plurality of input/output processes are performed to one device at the same time, a device number different from the original device number is used to cause the following state in write transfer between the source and target external storage controller units. This will be described below.
A method for defining a device number different from the original device number to the same device permits multiple processing to one device, but consumes an excess device number. In other words, since the number of devices definable is finite, the substantial number of devices definable is reduced by a different device number defined. Use of the excess device number is true for write request transfer between the source and target external storage controller units. Further, in addition to the write request transfer, the transfer between the source and target external storage controller units must control the transfer and send/receive information for controlling the relation of duplexing itself between the source and target external storage controller units. This transfer needs a device number and, if possible, it is desirable to avoid consumption of an excess device number.
Furthermore, in transfer of a write request to the target external storage controller unit, a plurality of data of different target devices are processed for each device. Overhead for transfer of the transfer or reception process is caused in the respective transfer processes, resulting in lowering of performance.
An object of the present invention is to provide a transfer technique of write data from a source external storage controller unit to a target external storage controller unit in which in a process of writing the write data received from a host CPU into an external storage device unit below the target external storage controller unit, multiple processing is performed to one device so as not to be dependent on a device number thereof.
Another object of the present invention is to provide a technique for reducing overhead for transfer in which in a process of writing write data received from a host CPU into an external storage device unit below a target external storage controller unit, a target device is different.
The foregoing object is achieved so that a plurality of write data received from the host CPU to the same device are unified to one unit of data transmitting to the target storage system, a number not dependent on the device number used when the host CPU specifies a device is allocated to this, and the source external storage controller unit sends write data to the target external storage controller unit.
The foregoing another object is achieved so that a plurality of write data received from the host CPU to a different device are unified to one unit of data transmitting to the target storage system, and the source external storage controller unit sends write data to the target external storage controller unit.
REFERENCES:
patent: 5652857 (1997-07-01), Shimoi et al.
patent: 5809511 (1998-09-01), Peake
patent: 6366987 (2002-04-01), Tzelnic et al.
patent: 6643667 (2003-11-01), Arai et al.
Nakamura Katsunori
Takahashi Masamitsu
Takeda Takahiko
Tsuboki Masanao
Hitachi , Ltd.
Townsend and Townsend / and Crew LLP
Vital Pierre M.
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