Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-11-30
2004-02-17
Coleman, William David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S382000
Reexamination Certificate
active
06692998
ABSTRACT:
FIELD OF THE INVENTION
The field of the invention is SOI integrated circuit processing to form an integrated circuit including field effect transistors (FETS) and diodes.
BACKGROUND OF THE INVENTION
Integrated circuits routinely use diodes according to the requirements of the circuit designer. In contemporary sub-micron FET processing, however, it is customary to employ “halo” or “pocket” implants in order to improve short-channel behavior of MOSFETs. This has the side effect of making P-N junctions that receive the halo implant leaky, so that they are not suited for use as band gap voltage regulators and for other requirements of analog circuits.
One could simply add process steps to form a high-quality diode, of course, but that would increase process complexity and therefore increase circuit cost.
It would be advantageous if a high-quality diode could be formed for analog applications that made use of process steps that were already present in a process.
SUMMARY OF THE INVENTION
The invention relates to a method of forming a high-quality diode in an SOI process, in which the steps of forming the diode are also used in forming other devices in the circuit, thus providing the diode without adding process complexity.
A feature of the invention is the use of an implant dose made available for the formation of buried precision resistors to form one side of the diode.
Another feature of the invention is the use of FET elements to form the active region of the P-N junction below the gate oxide and away from the source/drain edges used to contact the P-N diode.
Another embodiment of the invention is the use of a blocking insulator, normally used to form active resistor regions, to form and passivate the surface of a P-N diode junction and to block the diode from being shorted during the suicide step.
An advantageous feature of the invention is the use of the buried resistor implant, which is defined by photoresist, so that the P-N junction can be located at a preferred location, rather than using the source/drain implant, which is defined by a polysilicon layer and is not flexible in location.
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patent: 6100153 (2000-08-01), Nowak et al.
patent: 6242763 (2001-06-01), Chen et al.
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patent: 6291325 (2001-09-01), Hsu
patent: 6303414 (2001-10-01), Ang et al.
patent: 6429482 (2002-08-01), Culp et al.
Maciejewski Edward P.
Nowak Edward J.
Coleman William David
International Business Machines - Corporation
Neff Daryl K.
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