Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
1999-07-30
2004-11-23
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S003000, C714S006130, C714S011000, C714S013000
Reexamination Certificate
active
06823471
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to data processing and, in particular, to hardware faults in a data processing system. Still more particularly, the present invention relates to a processor and data processing system having redundant hardware partitions that provide repair capability.
2. Description of the Related Art
In order to capitalize on the high performance processing capability of a state-of-the-art processor core, the storage subsystem of a data processing system must efficiently supply the processor core with large amounts of instructions and data. Conventional data processing systems attempt to satisfy the processor core's demand for instructions and data by implementing deep cache hierarchies and wide buses capable of operating at high frequency. Although heretofore such strategies have been somewhat effective in staying apace of the demands of the core as processing frequency has increased, such strategies, because of their limited scalability, are by themselves inadequate to meet the data and instruction consumption demands of state-of-the-art and future processor technologies operating at 1 GHz and beyond.
SUMMARY OF THE INVENTION
To address the above and other shortcomings of conventional processor and data processing system architectures, the present invention introduces a processor having a hashed and partitioned storage subsystem. A processor includes execution resources, data storage, and an instruction sequencing unit, coupled to the execution resources and the data storage, that supplies instructions within the data storage to the execution resources. At least one of the execution resources, the data storage, and the instruction sequencing unit is implemented with a plurality of hardware partitions of like function for processing a respective one of a plurality of data streams. If an error is detected in a particular hardware partition, the data stream assigned to that hardware partition is reassigned to another of the plurality of hardware partitions, thus preventing an error in one of the hardware partitions from resulting in a catastrophic failure.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
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Arimilli Ravi Kumar
Clark Leo James
Dodson John Steve
Guthrie Guy Lynn
Lewis Jerry Don
Beausoliel Robert
Dillon & Yudell LLP
International Business Machines - Corporation
Maskulinski M C
Salys Casimer K.
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