Sense amplifier circuit for semiconductor memory device

Details Sense amplifier circuit for semiconductor memory device Sense amplifier circuit for semiconductor memory device

1995-02-13

1996-04-16

Sikes, William L.

Static information storage and retrieval

Read/write circuit

Differential sensing

36518906, G11C 702

Patent

active

055089666

ABSTRACT:
In order to increase the speed, reduce the number of components and lower power consumption in a sense amplifier circuit for reading data held in a selected memory cell, current difference appearing on a data line is converted to potential difference directly by a current mirror circuit in accordance with data held in a selected memory cell. This current mirror circuit includes a diode for clamping the potential of the data line, and a transistor which is connected with this diode in a current mirror arrangement. A sense current flows through the diode in accordance with the data held in the selected memory cell, a corresponding current flows through the transistor by a current mirror operation, and the sense current is monitored. The monitored sense current is converted to a voltage signal indicating data of the selected memory cell.

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Textbook--Microelectronic Circuits, 2nd Edition Adel S. Sedra & Kenneth C. Smith HRW, Inc., New York, 1987, PG A-9.
"A 9ns 4Mb BICMOS SRAM with 3.3V Operation", by Hatsuhiro Kato et al, ISSCC Digest of Technical Papers, Feb. 1992, pp. 210-211.

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