Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2000-10-26
2004-08-03
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S506000
Reexamination Certificate
active
06771270
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a graphics memory system and, more particularly, to a graphics memory system that utilizes a variable-width, stall-free object builder for coalescing and aligning read data received from multiple memory controllers.
BACKGROUND OF THE INVENTION
The role of the object builder in a frame buffer controller (FBC) is to take read data directly from the memory controller (MC) and align it to match the original read request. To avoid a bottleneck in memory bandwidth, the FBC will sometimes have a plurality of memory controllers (MCs). In this case, the object builder must also correctly order the incoming data from the memory controllers, store whatever cannot fit in the next outgoing object, and control the flow of incoming data into the object controller.
In a known graphics memory system, the object builder stalled incoming data when certain conditions occurred in order to prevent data being processed in the completion building stage of the object builder from being overwritten. This stall was seen at the output of the object builder and resulted in a wasted state. The known graphics memory system utilized many special case states to inform the object builder of the composition of the incoming data. For example, a special case state was used to inform the object builder of the condition where the incoming tile completed a partial object and contained another whole object. This would cause the object builder to stall the incoming tile in order to prevent data in the completion building stage from being overwritten. The use of these special case states necessitated a relatively complicated algorithm for the object builder algorithm.
Accordingly, a need exists for an object builder that utilizes a relatively simple, general algorithm for object building and that eliminates unnecessary stalls from occurring in the incoming object builder pipeline. A need also exists for an object builder that accomplishes these objectives and which easily accommodates various sizes of tiles and objects.
SUMMARY OF THE INVENTION
The present invention provides a variable-width object builder for use in a graphics memory system of a computer graphics display system. The tile size to object size ratio for the object builder is variable and can be 1:1 or greater.
In accordance with the preferred embodiment of the present invention, the frame buffer controller of the graphics memory system preferably comprises three memory controllers. The memory controllers each output 32-bit words to the object builder. Therefore, the object builder preferably has a 96-bit incoming stage. The object builder preferably outputs either two 32-bit words or two 24-bit words onto a 64-bit wide internal read-back bus.
The object builder preferably utilizes a general purpose object building algorithm that eliminates stalls in the incoming stage of the object builder, thereby eliminating the potential for wasted states at the output of the object builder. A side effect of reducing the complexity of the object building algorithm is that a variety of tile and object sizes can be accommodated. The ratio of tile size to object size can range from 1 to 2 without requiring any significant change in architecture, and higher ratios can be accommodated by adding additional backup registers.
Other features and advantages of the present invention will become apparent from the following discussion, drawings and claims.
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Lin, Wai-Sum et al, Adaptive Parallel Rendering on Multiprocessors and Workstation Clusters, IEEE, Dec., 1999.
Hewlett--Packard Development Company, L.P.
Tung Kee M.
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