Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-07-08
2004-12-28
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S149000, C438S152000
Reexamination Certificate
active
06835608
ABSTRACT:
This application claims the benefit of Korean Application No. P2001-41379 filed on Jul. 10, 2001, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for crystallizing an amorphous film, and more particularly, to a method for crystallizing an amorphous film for enhancing crystallinity, and a method for fabricating a liquid crystal display (LCD) by using the same.
2. Background of the Related Art
As devices become larger, and more integrated, switching devices become thinner. Consequently the present amorphous silicon thin film transistors are replaced with polycrystalline thin film transistors.
With a process temperature below 350° C., though the amorphous silicon thin film transistor can be fabricated on a glass substrate with ease, it is difficult to employ the amorphous silicon thin film transistor in a fast operation circuit due to low mobility.
However, as the polycrystalline silicon has a mobility higher than amorphous silicon, a driving circuit can be fabricated on a glass substrate. Therefore, the polycrystalline silicon is preferable for a switching device of a high resolution, large sized device.
The polycrystalline silicon may be formed by direct deposition of the polycrystalline silicon, or crystallizing amorphous silicon after the amorphous silicon is deposited.
The direct deposition method includes Low-Pressure Chemical Vapor Deposition (LPCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), and the like. LPCVD is disadvantageous in that it requires expensive silica or quartz as opposed to a glass substrate due to the deposition of polycrystalline silicon at an elevated temperature higher than 550° C. PECVD includes depositing by using a mixture gas of SiF
4
/SiH
4
/H
2
, which has poor thin film characteristics even though deposition at a low temperature below 400° is possible. Therefore, the latter method is widely employed.
The crystallizing method includes Solid Phase Crystallization (SPC), Excimer Laser Annealing (ELA), Metal Induced Crystallization (MIC), including Field Enhanced-Metal Induced Crystallization (FE-MIC), and the like. SPC is comparatively simple since it only requires a long time period of heat treatment in a furnace of where temperature is more than 600° C. for forming the polycrystalline film. A high crystallization temperature and a long heat treatment time period (≧20 hrs) are essential. SPC has disadvantages in that fabrication of a device by SPC has many difficulties because SPC causes many defects inside of crystallized grains, and the glass substrate cannot be used due to the high crystallizing temperature.
In ELA, crystallizing a thin film by irradiating an excimer laser with a short wave length and a high energy, momentarily facilitates a low temperature crystallization at a temperature below 400° C., and produces a large sized crystalline grain with excellent properties. However, since ELA progresses non-uniform crystallization and requires expensive equipment, ELA is not suitable for mass production and fabrication of large sized devices.
There are other methods including a method for inducing crystallization by adding impurities, such as germanium (Ge), a method for crystallizing a thin film by using microwave, and the like, however no excellent device characteristics are obtainable yet.
Among these methods, there is the FE-MIC method in which a catalytic metal is added to an amorphous silicon thin film, and an electric field is applied thereto for crystallization. A crystallization reaction occurs at a relatively low temperature as the catalytic metal in contact with the amorphous silicon thin film decreases a bonding energy of the silicon. The crystallization temperature of the thin film decreases significantly, shortening the crystallization time period. These are all favorable for large sized glass substrate applications.
In general, FE-MIC is influenced by an amount of the catalytic metal; the more the catalytic metal, the lower the crystallization temperature.
In the meantime, there are three important factors that influence the crystallization of an amorphous silicon thin film; an incubation time period, a nucleation rate, and a grain growth rate.
The incubation time period is a time period required until crystallized nuclei appear, and the nucleation rate and the grain growth rate are the rates at which crystallized nuclei form and grow. Therefore, to have no defects and an increasing grain size, the nucleation rate is required to be reduced and the grain growth rate increased.
The steps of a related art method for crystallizing an amorphous film, and the steps of a related art method for fabricating an LCD by using the same will be explained, with reference to the attached drawings.
FIGS. 1A-1C
illustrate the steps of a related art method for crystallizing an amorphous silicon film. The steps of a related art method for crystallizing an amorphous film will be explained.
Referring to
FIG. 1A
, a buffer layer
2
is formed on a substrate
1
, and an amorphous silicon film
3
is deposited thereon at 300-400° C. by Plasma Enhanced CVD (PECVD), Low-Pressure CVD (LPCVD) using silane gas, or by sputtering, to form an amorphous silicon thin film.
Next, referring to
FIG. 1B
, a metal, such as nickel, is deposited on the amorphous thin film
3
by using plasma of a non-reactive gas to form a catalytic metal layer
4
.
Then, referring to
FIG. 1C
, an electric field is applied to the amorphous silicon thin film
3
having the catalytic metal layer
4
formed thereon by means of electrodes
5
formed at both ends thereof, to make free electrons in the catalytic metal layer active. Then, free electrons of the nickel decrease the bonding energy of the silicon, resulting in a decrease in crystallization temperature, and the nickel atoms diffuse into the silicon layer, to form nickel silicide NiSi
2
.
Then, the nickel silicide causes the growth of needle-like forms of crystalline grains in an <111> orientation direction, resulting in crystallization of the amorphous silicon thin film
3
into a polycrystalline silicon thin film.
FE-MIC can shorten the crystallization time period extremely and decrease the crystallization temperature required in the present MIC by applying an electric field to the amorphous silicon thin film containing a catalytic metal. By applying the foregoing method for crystallizing an amorphous film to semiconductor devices and LCDs, devices having a high mobility can be fabricated.
The step of the related art method for fabricating an LCD by using the FE-MIC will be explained.
First, the polycrystalline silicon thin film is patterned, to form an active semiconductor layer, and a silicon nitride SiNx is deposited on an entire surface including the semiconductor layer, to form a gate insulating film.
Then, a low resistance metal film is deposited on the gate insulating film, patterned by photolithography, to form a gateline and a gate electrode, and impurities are injected into the semiconductor layer with the gate patterns used as mask, to form source/drain regions.
Next, source/drain electrodes are formed for connecting the dataline perpendicular to the gateline and the source/drain regions. The data patterns are insulated from the gate patterns by an interlayer insulating film.
Then, a protection film is formed on an entire surface including the source/drain electrodes, and a pixel electrode is formed connected to the drain electrode through the protection film, thereby completing fabrication of an array substrate of an LCD.
When a color filter substrate is bonded to the array substrate, and a liquid crystal layer is formed between the two substrates, the LCD is formed.
However, the related art method for crystallizing an amorphous film, and a method for fabricating an LCD by using the same have the following problems.
Though the FE-MIC can decrease the crystallization temperature of an amorphous silicon by increasing a grain growth rate, FE-MIC has the limitation
Jang Jin
Kim Kyung Ho
Kennedy Jennifer M.
LG. Philips LCD Co. Ltd.
McKenna Long & Aldridge LLP
Niebling John F.
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