Methods for treating pluralities of discrete semiconductor...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S680000

Reexamination Certificate

active

06835674

ABSTRACT:

The invention pertains to methods for treating pluralities of discrete semiconductor substrates to form layers of material over the substrates. In particular applications, the invention pertains to atomic layer deposition of materials over semiconductor substrates. The invention also pertains to apparatuses which can be utilized during treatment of a plurality of discrete semiconductor substrates.
BACKGROUND OF THE INVENTION
It is frequently desired to form high quality layers of material over semiconductor substrates during semiconductor device fabrication. Among the materials which can be included in such layers are tantalum pentoxide, titanium nitride, titanium silicon nitride, tantalum nitride, tantalum silicon nitride, titanium silicide, tantalum silicide, tungsten nitride, aluminum oxide, hafnium oxide, zirconium oxide, silicon nitride, silicon dioxide, elemental tungsten and elemental titanium. Numerous methods have been developed for forming layers of such materials, with exemplary methods including chemical vapor deposition (CVD), and in some cases atomic layer deposition (ALD).
Chemical vapor deposition comprises mixing two or more reactants in a chamber to form a material which subsequently deposits across exposed surfaces of one or more semiconductor substrates. An advantage of chemical vapor deposition is that it can be utilized in batch processes, or, in other words, can be utilized to simultaneously treat a plurality of discrete sem-iconductor substrates. Among the disadvantages of chemical vapor deposition is that it can be difficult to control reactions between the reactants provided in a chamber, and accordingly various side-reactions can occur to generate contaminants. Additionally, it can be difficult to form a uniform layer over multiple exposed surfaces of one or more semiconductor substrates with CVD. The deposition of CVD material can be faster in various regions of semiconductor typography than other regions, leading to non-uniformity in a thickness of the deposited material across various exposed surfaces of semiconductor substrates provided within a CVD reaction chamber.
ALD can overcome some of the problems discussed above relative to CVD. ALD processing typically comprises forming thin films of material by repeatedly depositng monoatomic layers. The technique involves individually depositing precursors, or reactants, that react in situ to form a desired film of material across a semiconductor substrate. More specifically, ALD processes involve introduction of a first reactant which reacts with a substrate to form a monolayer across the substrate. The first reactant will typically react with the substrate, but not with itself. Accordingly, side-reactions are eliminated. Further, the reaction of the reactant with the substrate is self-limiting, in that once a monolayer forms across exposed surfaces of the substrate there is no longer further reaction of the reactant with the substrate.
After the monolayer is formed, the first reactant is flushed from the processing chamber, and a second reactant is subsequently introduced. The second reactant reacts with the monolayer of material formed from the first reactant to convert such monolayer into a desired mass over the substrate. The desired mass can be uniformly thick across the various surfaces of the substrate. The mass can be made thicker by repeating the above-described process. Specifically, the mass can become an upper surface of a semiconductor substrate, and can be utilized for reaction with the first reactant. Subsequently, the second reactant can be introduced to form a second layer of the mass over the first layer. The process can be repeated until a desired thickness of the mass is formed.
A problem with existing ALD technologies is that such are not typically suitable for utilization in batch processes. Rather, semiconductor substrates are treated one at a time, and throughput of substrates through ALD processes is thus low relative to CVD processes. Some effort has recently been made to develop batch processes for ALD of silicon nitride. Specifically, a batch of wafers is exposed to trichlorosilane in a reaction chamber to form a silicon-containing monolayer over exposed surfaces of the substrates. Subsequently; the trichlorosilane is evacuated from the chamber and ammonia is introduced to convert the silicon-containing material to silicon nitride. The trichlorosilane deposition occurs at a temperature at least 150° C. different than the ammonia treatment.
It would desirable to extend batch ALD processes to other materials besides silicon nitride. It would also be desirable to develop improved processes for batch ALD of silicon nitride.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide (such can be considered an in situ cleaning of the substrates). After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass.
In one aspect, the invention encompasses a method in which a plurality of discrete semiconductor substrates are placed within a reaction chamber and simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The second mass comprises one or more of tantalum, titanium, tungsten, aluminum, hafnium, SiO and Zr, with the listed composition of SiO being shown in terms of the elements contained therein rather than in terms of a stoichiometric relationship with the elements.
In one aspect, the invention encompasses a method in which a plurality of discrete semiconductor substrates are treated within a reaction chamber. The substrates are first exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates, with the substrates being held at a first temperature during the exposure to the first reactive material. The first reactive material is then removed from the reaction chamber. Next, the substrates are exposed to a second reactive material to convert the first mass to a second mass, with the substrates being at a temperature within about 100° C. of the first temperature during the exposing to the second reactive material. It is noted that in particular aspects of the invention, the temperature of the substrates during exposure to the first reactive material can vary by more than 100° C. relative to the temperature of the substrates during exposure to the second reactive material.
Various aspects of the invention can utilize a fast ramp furnace to control the temperature of substrates exposed to reactive materials, and the purging of reactive materials from a reaction chamber can occur during ramp-up and/or ramp-down of the temperature of substrates within the chamber.
Various aspects of the invention can utilize remote assisted chemical activated methodologies to enhance atomic layer deposition. For example, plasma-assist and/or pre-heating of materials can be utilized in methodology of the present invention.
In one aspect, the invention encompasses apparatuses which can be utilized for treating a plurality of discrete semiconductor substrates. The apparatuses can be particularly well suited for atomic layer deposition.


REFERENCES:
patent: 4058430 (1977-11-01), Suntola et al.
patent: 4389973 (1983-06-01), Suntola et al.
patent: 5281274 (1994-01-01), Yoder
patent: 5879459 (1999-03-01), Gadgil et al.
pat

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