Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2001-05-24
2004-02-10
Nguyen, T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S171000, C711S172000, C711S173000, C711S203000, C707S793000, C707S793000
Reexamination Certificate
active
06691217
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to memory access in computer systems, and more specifically, how to determine if Memory Windows are bound to a specific Memory Region.
2. Description of Related Art
In a System Area Network (SAN), the hardware provides a message passing mechanism which can be used for Input/Output devices (I/O) and interprocess communications between general computing nodes (IPC). Consumers access SAN message passing hardware by posting send/receive messages to send/receive work queues on a SAN channel adapter (CA). The send/receive work queues (WQ) are assigned to a consumer as a queue pair (QP). The messages can be sent over five different transport types: Reliable Connected (RC), Reliable datagram (RD), Unreliable Connected (UC), Unreliable Datagram (UD), and Raw Datagram (RawD). Consumers retrieve the results of these messages from a completion queue (CQ) through SAN send and receive work completions (WC). The source channel adapter takes care of segmenting outbound messages and sending them to the destination. The destination channel adapter takes care of reassembling inbound messages and placing them in the memory space designated by the destination's consumer. Two channel adapter types are present, a host channel adapter (HCA) and a target channel adapter (TCA). The host channel adapter is used by general purpose computing nodes to access the SAN fabric. Consumers use SAN verbs to access host channel adapter functions. The channel interface (CI) interprets verbs and directly accesses the channel adapter.
A Memory Region is an area of memory that is contiguous in the virtual address space and for which the translated physical addresses and access rights have been registered with the HCA. A Memory Window is an area of memory within a previously defined Memory Region, for which the access rights are either the same as or a subset of those of the Memory Region.
SUMMARY OF THE INVENTION
The present invention provides a method, program and system for associating memory windows with memory regions in an infiniband data storage system. The invention comprises registering a Memory Region, wherein the Memory Region is a set of virtually contiguous memory addresses defined by a virtual address and length. The system then establishes and maintains a Window Reference Count (WRC) for the Memory Region, which tracks the number of Memory Windows which are bound to the Memory Region. When the system binds a Memory Window to the Memory Region, the value of the WRC is incremented. When a Memory Window is unbound from the Memory Region, the value of the WRC is decremented. If no Memory Windows are bound to the Memory Region, the value of the WRC is zero.
Before the Memory Region is deregistered, the WRC is checked to determine if any Memory Windows are bound to the Memory Region. If any Memory Windows are bound to the Region, the system will either invalidate the Windows and allow deregistration to proceed, or it will return an error and suspend deregistration until special code has performed all necessary unbinds of the Windows. Once the value of the WRC equals zero, the system deregisters the Memory Region.
REFERENCES:
patent: 5687370 (1997-11-01), Garst et al.
patent: 5842019 (1998-11-01), Kolawa et al.
patent: 6026415 (2000-02-01), Garst et al.
patent: 6304884 (2001-10-01), Garst et al.
patent: 6339818 (2002-01-01), Olszewski et al.
Beukema Bruce Leroy
Craddock David F.
Gregg Thomas Anthony
Recio Renato John
McBurney Mark E.
Nguyen T.
Yee Duke W.
Yociss Lisa L. B.
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