Method of analyzing and filtering timing runs using common...

Details Method of analyzing and filtering timing runs using common... Method of analyzing and filtering timing runs using common...

2002-01-07

2004-08-17

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C375S326000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06779162

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a microprocessor chip design and, more particularly, to analyzing timing reports used in designing a microprocessor chip for identification of all negative timing paths in a minimum amount of time.
2. Description of the Related Art
Today's microprocessor chips contain millions of logic gates with millions of connections. Timing reports are often hundreds of millions of bytes long containing thousands of paths. In general, timing tools generate a report listing all paths within a set of logic specified by a user and sorted by worst negative slack. The reports are then analyzed manually.
Designers sort through each report, picking out critical paths starting from the most negative paths working their way down to zero. When the report is too large and includes multiple units, it is often broken down into smaller reports by units and then handed over to unit owners for manual analysis. To analyze such reports and keep track of timing fixes is a huge task. Because critical paths are not necessarily listed at the top of the reports, and are easily buried in the reports, one cannot be sure that all critical paths are identified, until an entire report is analyzed.
Therefore, there is a need for a method of analyzing timing reports to identify all negative paths quickly and efficiently.
SUMMARY OF THE INVENTION
The present invention is related to a method for analyzing timing runs.
In accordance with one embodiment of the invention, a method is provided for analyzing a timing report. Timing paths that share common characteristics are grouped. A list file containing the timing paths is created. The timing report is searched for timing paths that match the timing paths in the list file. A first summary report on the timing paths in the input list is generated. The first summary report lists the status of the timing paths. It is determined whether there are new timing path(s) not found in the input list.
In accordance with another embodiment of the invention, a computer program product is provided for analyzing a timing report file. The computer program product has a medium with a computer program embodied thereon. Computer program code reads in a list file containing unique timing paths grouped from a plurality of timing paths. Computer program code reads in timing paths stored in the timing report file. Computer program code extracts information from the timing paths. Computer program code compares the information to the timing paths contained in the list file.


REFERENCES:
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Berman, C. Leonard, et al.;Efficient Techniques for Timing Correction; IEEE Article; pp. 415-419; CH2868-8/90-0000; (1990).

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