Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-05-27
2004-08-03
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S653000, C438S660000, C438S687000
Reexamination Certificate
active
06770560
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a method of forming a metal layer (for instance, a buried copper (Cu) layer).
In order to improve the electro-migration (EM) resistance of a copper layer in a semiconductor element, a countermeasure to diffuse an impurity element in the copper layer is known. As a method of forming such copper layer, there is a method in which a Cu alloy seed layer is formed on an inner surface of a groove by use of sputtering apparatus, subsequently a copper plating layer is formed by use plating apparatus, thereafter by applying heat treatment, an additive element (that is, an impurity element) in the Cu alloy seed layer is allowed to diffuse into the Cu plating layer.
However, in the above-mentioned method of forming a metal layer, a sample (wafer) thereon the Cu alloy seed layer is formed in the sputtering apparatus is transferred through air exposure to the plating apparatus and there the Cu plating is performed. Accordingly, because of oxidation of the additive element of the Cu alloy seed layer, on a surface of the Cu alloy seed layer an oxidation layer is formed. As a result, there are concerns about deterioration of the adhesion between the Cu alloy seed layer and the Cu plating layer.
Furthermore, the impurity element diffused into the Cu plating layer can work on one hand so as to improve the EM resistance of the Cu plating layer but on the other hand also works so as to suppress grains of the Cu plating layer from growing. Accordingly, since in the Cu plating layer after the heat treatment, there are fine crystallites, there is a problem in that the fine crystallites deteriorate the EM resistance.
SUMMARY OF THE INVENTION
The invention may overcome the problems of the existing technology such as mentioned above and may intend to provide a method of forming a metal layer that allows forming a metal layer excellent in the adhesion and the EM resistance.
In a method of manufacturing a semiconductor device according to the present invention, a semiconductor substrate including an insulating layer is provided. A groove is formed on the insulating layer. An additive-containing barrier layer is formed on the insulating layer. A metal seed layer and a metal layer are formed on the barrier layer. Then, the metal layer is subjected to a first heat treatment at a first temperature that is capable of promoting grain growth of the metal seed layer and the metal layer. The barrier layer, the metal seed layer and the metal layer are partially removed so that a conductive layer including the metal seed layer and the metal layer is formed in the groove. Finally, the conductive layer is subjected to a second heat treatment at a second temperature that is higher than the first temperature and allows an additive element in the barrier layer to diffuse into the metal layer.
REFERENCES:
patent: 6127256 (2000-10-01), Matsuno
patent: 6323120 (2001-11-01), Fujikawa et al.
patent: 6342447 (2002-01-01), Hoshino
patent: 6391774 (2002-05-01), Takewaki
patent: 6482741 (2002-11-01), Ueno
patent: 11-297696 (1999-10-01), None
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