Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Fluid growth step with preceding and subsequent diverse...
Reexamination Certificate
2002-08-07
2004-10-19
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Fluid growth step with preceding and subsequent diverse...
C438S466000, C438S960000
Reexamination Certificate
active
06806171
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to methods of producing thin crystalline films. More particularly, the present invention relates to fabrication methods for silicon-on-insulator wafers.
BACKGROUND OF THE INVENTION
In previous art several methods of producing thin crystalline films are known:
(a) polishing (mechanical or chemical-mechanical) to thin an initial substrate
(b) time-controlled etchback to thin an initial substrate,
(c) etch-stop layer controlled etchback to thin an initial substrate,
(d) epitaxial lift-off of a layer from an initial substrate,
(e) separation by implanted oxygen (SIMOX)
(f) epitaxial layer transfer Eltran™, and its versions (Fipos etc.),
(g) layer transfer using hydrogen implantation (Smart-cut™ and its versions—Genesis™, Smarter-cut, etc.)
(h) layer transfer using hydrogen mesotaxy
Polishing allows thinning a final substrate that is several times thinner than an initial substrate. This method is not applicable to obtain a thin film
102
(few microns or less) from initial substrate
101
, or thinning of initial substrate by several orders of magnitude. Polishing down is limited by the increasing non-uniformity in thickness
103
of the thinned substrate
102
FIG.
1
.
The usefulness of the time-controlled etchback of an initial substrate
201
is also limited by increasing of the non-uniformity
203
of final thinned substrate
202
with etching FIG.
2
.
Etch-stop-layer
302
controlled etchback allows getting final thinned layers
303
that are uniform in thickness, and can be 2 to 3 orders of magnitude thinner than an initial substrate, and also allows to get final thin crystalline films
303
. In crystal silicon a typical etch stop layer is heavily boron-doped layer. However, the etched part
301
of the initial substrate is sacrificed, FIG.
3
.
An epitaxial lift-off does not allow slicing or grafting of crystalline layers with an area bigger than about 1 square inch. For silicon technology, a standard diameter of wafer
402
is 200 to 300 mm, and therefore the epitaxial lift-off cannot be used. An etchant in the epitaxial lift-off approaches a sacrificial layer
403
from the periphery of the sacrificial layer. With etching, a periphery of the layer to be lifted-off
401
begins to release. If the released part of the layer
401
to be lifted-off self-bends upward, then a penetration path for a fresh etchant appears, and the etchant continues to etch along the plane of the sacrificial layer. With increasing of lift-off area, either the etch rate becomes too slow or the released part of a layer
401
breaks off FIG.
4
.
SIMOX is a method making of silicon-on-insulator wafers. It can be also considered as a method of thinning of crystalline silicon wafers where the layer is separated from an initial substrate by forming a silicon dioxide layer inside of the silicon substrate. The separation layer is formed by implantation of oxygen ions into the substrate and subsequent internal oxidation of silicon. The thinned silicon film is not free standing but is affixed to the parent substrate and is separated from the substrate with the built-in SiO
2
film. Disadvantage is that the SIMOX is expensive due to the high implantation dose needed (about 10
18
cm
−2
). Also, the wafer size is limited to 200 mm because of wafer bow during the high temperature (about 1350° C.) step required for internal oxidation.
Next, more advanced thinning techniques, ELTRAN and Smart-cut, also produce layers that are too thin to handle conveniently. Therefore, those techniques involve a step of placing and affixing of the layer onto a handle substrate. This step is usually called “wafer bonding”. Therefore those techniques are also called as layer transfer techniques, meaning that the layer is cut from a first (donor or parent) substrate and affixed to a second (handle or support) substrate. The ELTRAN and Smart-cut were initially developed in silicon technology, so they are also referred as methods of making of silicon-on-insulator wafers.
In the ELTRAN process (T. Yonehara, K. Sakaguchi, N. Sato, “Epitaxial Layer Transfer by Bond and Etch Back of Porous Si,” Appl. Phys. Lett., Vol. 64, p. 2108, 1994).
FIG. 5
, a porous silicon layer
502
is first formed on a surface of a silicon crystalline substrate
501
. Next an epitaxial layer
503
is grown on surface of the porous silicon
502
. The epitaxial layer
503
covers pores, and after exceeding a certain thickness a non-porous layer grows under continuing epitaxy. A support (typically, oxidized) wafer
504
is bonded to a surface of the epitaxially grown layer
503
. The bonded assembly is than separated along the porous silicon layer using a water jet. The thin layer
503
is formed and affixed to a handle wafer
504
. However, the crystalline quality of the epitaxial layer grown on a surface of the porous layer is limited. The quality of epitaxially grown layer degrades with an increasing of initial porosity. On the other hand, the essential step of cleaving along the plane of the porous layer requires that the porous layer have high porosity, typically over 70%. The ELTRAN does not allow getting high crystalline quality of the layer.
Numerical attempts were made to improve the quality of ELTRAN epitaxial film by forming a high porosity sublayer underneath of a low porosity sublayer. Those approaches include either ion implanting before anodic etching (Sakaguchi, U.S. Pat. No. 6,221,738) or increasing of anodic current before the end of anodization (C. S. Solanki, R. R. Bilyalov, H. Bender, J. Poortmans, “New Approach for the formation and separation of a Thin Porous Silicon Layer”, Physica Status Solidi A, vol. 182, pp.97-101, 2000). At the beginning of the process the current has a low value and low porosity silicon is formed. After reaching a desirable depth, the current is increased, and porosity of silicon increases. However, those approaches are often non-repeatable.
In previous art, there is also known a method of producing a thin layer of crystalline material taught by Bruel (U.S. Pat. No. 5,374,564). This method also called Smart-cut™ is detailed in FIG.
6
. In this process, an initial crystalline substrate
601
is implanted with hydrogen that collects in a layer
603
and constitutes a thin layer
604
. The substrate
601
is bonded along an interface
605
to another substrate
602
and then cleaved along the hydrogen rich layer
603
. The method of Bruel allows obtaining very thin and uniform layers
604
. However, the process is expensive because of the required high implantation dose (5×10
16
cm
−2
) of hydrogen performed at low ion current. Another disadvantage is that a range of a thickness of the layers is limited from about 0.4 to about 1.5 microns.
In previous art, there is also known a layer transfer method by growing of an enclosed thin layer of hydrogen platelets within a silicon substrate (Usenko, U.S. Pat. No. 6,352,909). Due to the method a buried layer of defects is formed in a silicon wafer, then hydrogen is diffused into the wafer. The hydrogen get trapped onto the defects, and then the hydrogen-rich layer rearranges into a layer of hydrogen platelets under proper thermal trajectory during the hydrogenation. Further hydrogen diffusion into the wafer causes gettering of hydrogen onto the newly formed platelets (hydrogen mesotaxy) and the platelets grow in size. A stress distribution inside the substrate enhances growth of the platelets along the plane along the initial layer of defects. Finally a platelet-rich layer is formed that is fragile enough permit cleaving of the substrate along the hydrogen platelet layer. Hydrogen is diffused into silicon from either a hydrogen plasma or from electrolyte. This method keeps advantages of Smart-cut concerning a crystalline quality of the final layer. An advantage over Smart-cut™ is that the Usenko method does not require an expensive high implantation dose at low implant rate. However, this method allows making only extremely thin crystalline layers with typical thickness of about 0.1 micron. An i
Ulyashin Alexander
Usenko Alexander
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