Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-08-26
2004-08-31
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S288000, C257S368000, C438S197000
Reexamination Certificate
active
06784487
ABSTRACT:
FIELD OF THE INVENTION
The invention concerns a monolithically integrated semiconductor component.
BACKGROUND INFORMATION
Monolithically integrated semiconductor components of the species are known. They include, for example, a vertical MOS (metal oxide silicon) transistor that has a relatively lightly doped substrate region of a first conductivity type and a more highly doped layer of the same conductivity type for contacting (drain connection). Introduced into the substrate region is at least one conductivity region of opposite conductivity type, which in each case surrounds a further conductivity region of the first conductivity type.
This results in the formation of two PN transitions, of which a first PN transition is short-circuited by a source connection. Applied on the substrate surface is an MOS structure by means of which the region of the second charge carrier regions close to the surface can be inverted, so that a conductive connection is created between the source connection and drain connection. The second charge carrier region is connected in electrically conductive fashion to the third charge carrier region through the source connection (short-circuiting the first PN transition), resulting in formation of a parasitic inverse diode. In a number of circuit variants, this parasitic inverse diode that necessarily forms can be used as a freewheeling diode. For example, if an inductive load is to be switched by means of the monolithically integrated component, the freewheeling diode allows reverse commutation of the current. If the inductive load is, for example, triggered with a bridge circuit made up of at least two MOS transistors that are connected as pulse-width-modulated inverters in a boost chopper circuit, a first MOS transistor is triggered in pulsed fashion so that the inductive load either freewheels via the parasitic inverse diode of the further MOS transistor or is recharged via the activated second MOS transistor. The switching-on operation of the pulse-triggered MOS transistor is relevant in this context, since what can occur here is that the inverse diode is energized and the charge is drained because the other MOS transistor is not conductive. This results in a so-called current breakdown situation that causes steep increases in &Dgr;I/&Dgr;t. These in turn cause overvoltages and high-frequency oscillations that result in undesirable interference effects.
It is known to connect, in parallel with the parasitic inverse diodes, Schottky diodes that have a lower forward voltage. As a result, the parasitic inverse diodes remain inactive so that no stored charge needs to be drained out of the substrate region of the MOS transistors. It is known from European Published Patent Application No. 0 899 791 to integrate the Schottky diodes into the monolithic component as parallel freewheeling diodes, necessitating an additional charge carrier implantation to establish a barrier. This additional charge carrier implantation requires considerable technical outlay, however, thereby increasing process costs.
SUMMARY OF THE INVENTION
The monolithically integrated semiconductor component, in contrast, the advantage that a Schottky diode connected in parallel with the parasitic inverse diode can be implemented in simple fashion. Because the first charge carrier region includes a further contacting area—that contacting area being additionally doped near the surface, depending on the doping concentration of the first charge carrier region, with a further near-surface charge carrier region of higher concentration, and being connected to the anode connection of the at least one Schottky diode—it is possible to generate a shielding structure within the first charge carrier region if the additional contacting area is pulled to a potential above the potential of the second charge carrier region. It is thereby possible to reliably design the so-called Schottky clamp for higher-inhibition MOS transistors, in which context a safety factor increase for the breakdown voltage (taking into account the forward voltage tolerances) can be reduced and optionally can be left out of consideration. Reducing the safety factor increase on the breakdown voltage means that the additional voltage drops which occur in conducting situations because of those safety factor increases are eliminated. The forward voltage tolerance thus has no substantial influence on the junction voltage of the parasitic inverse diodes, which in the context of higher-inhibition MOS transistors remain below 650 mV in order to prevent forward operation of the parasitic inverse diodes.
The additional contacting area which is all that is provided in order to implement the present invention can easily be achieved by a slight process modification in the manufacture of the monolithically integrated semiconductor component, by the fact that upon deposition of the metallizations for the contact areas of the source connections, at least one additional mask opening is simultaneously provided for the additional contacting area. Additional process steps are thus not necessary. All that is done is a change in the layout of the masking level for manufacturing the metallizations.
The Schottky diode that can be incorporated into the circuit arrangement by way of the additional contacting area moreover yields a reduction in power dissipation when the Schottky diode is inhibited or conductive. As a result of the shielding structure created beneath the additional contacting area in the first charge carrier region, only a relatively small blocking voltage occurs across the Schottky diode, so that the very high blocking-state currents typical of Schottky diodes can be greatly reduced or, conversely, a lower forward voltage can be achieved.
It is additionally advantageous that the Schottky diodes can easily be adapted to the monolithically integrated semiconductor component. The Schottky diode connected externally to the additional contacting area can, for example, be selected with regard to modified blocking voltage criteria or thermal criteria. Lastly, because it is now easy to arrange the Schottky diode physically separately from the MOS transistor structure, the additional power dissipation of the Schonky diode can occur in areas in which it does not contribute to heating of the monolithically integrated component. The fact that external utilization of the Schottky diode is easily provided furthermore offers the advantage that when MOS transistor structures are connected in parallel, it is not necessary to associate a separate Schottky diode with each transistor structure, but instead a common Schottky diode can be provided for multiple transistor structures.
REFERENCES:
patent: 4811065 (1989-03-01), Cogan
patent: 5744994 (1998-04-01), Williams
patent: 5973367 (1999-10-01), Williams
patent: 35 07 181 (1986-09-01), None
patent: 05 291 507 (1993-11-01), None
Flynn Nathan J.
Wilson Scott R.
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