Multiple data state memory cell

Details Multiple data state memory cell Multiple data state memory cell

2002-02-20

2004-10-26

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S002000, C257S003000, C257S005000, C365S100000, C365S148000, C365S163000

Reexamination Certificate

active

06809362

ABSTRACT:

TECHNICAL FIELD
The invention relates to random access memories (“RAMs”), and more particularly to memory cells of a RAM capable of storing data in multiple data states.
BACKGROUND OF THE INVENTION
Random access memory devices are an integral part of any computing environment. Without these memory devices, processing data in a computing device would be nearly impossible. Consequently, there has been a great amount of research and development directed to the area of random access computer memory. The research and development has been directed to different areas related to computer memory, for example, in increasing the speed at which data stored by the memory devices can be accessed, in designing memories with lower power consumption, and in engineering memory devices having greater data retention times. Additionally, one particular area to which a great amount of effort has been spent is in the areas of increasing memory density and data capacity.
One conventional approach to increasing memory density has been to decrease the size of memory devices, and more particularly, decrease the size of memory cells. As a result, the size of memory cells have been reduced dramatically in the recent past. However, the size of memory cells have diminished to the point where the current state of processing technology is being constantly challenged when manufacturing memory devices with these feature sizes. Another approach to the memory density and data capacity issue has been experiment with memory devices that are capable of storing data in more states than conventional binary memory. That is, conventional memory stores data in a binary format, where data is stored as either one of two different data states. With multiple data state memory, data can be stored as one of many different states, where the number of different states is greater than two. As a result, with multiple data state memory, generally less memory cells need to be used to store data. For example, a memory cell having four different data states can be substituted for two conventional memory cells having only two different data states. Consequently, only half as many memory cells would be needed to store the same quantity of data. Conversely, twice as much data can be stored in the same area if the multiple data state memory is the same size as conventional memory cells.
An example of the type of work that has been done in the area of multiple data state memory is provided in several U.S. patents to Ovshinsky et al. For example, in U.S. Pat. No. 5,296,716 to Ovshinsky et al., the use of electrically writeable and erasable phase change materials for electronic memory applications is described. Additionally, in U.S. Pat. No. 5,912,839 to Ovshinsky et al., a method of programming Ovonic memory multistate-digital multibit memory elements and the use in data storage is described. As described therein, a memory element including the phase change material, that is, materials which can be electrically switched between generally amorphous and generally crystalline, can be programmed by using a number of current pulses. In determining the data state of the memory element, the number of pulses can be discerned by counting the number of pulses required to return the resistance level of the memory element to a first state. The number of pulses represents the data state of the data stored by the memory element. As further described in the aforementioned patent, the process of reading the present state of the memory element is destructive, and consequently, requires that the data is reprogrammed following a read.
Another approach that has been taken in the design of multiple data state memory is described in U.S. patents to Kozicki et al. As described therein, a programmable metallization cell (PMC) formed from a fast ion conductor, such as a chalcogenide material that include compounds containing sulfur, selenium and tellurium, positioned between two electrodes. The formation of a non-volatile metal dendrite can be induced by application of a voltage difference between the two electrodes. The mass of the non-volatile dendrite changes the resistance of the PMC, which can be used as a means to store data in various states. Further described in the aforementioned patents are various structural embodiments of a PMC in different applications.
Although there has been development in the area of multiple data state and variable resistance memories, it will be appreciated that new and alternative approaches to this area is still possible. For example, further development in the area of multiple data state memory cells having true quantization of data states. Therefore, there is a need for alternative approaches to storing data in multiple data states.
SUMMARY OF THE INVENTION
The present invention is directed to a multiple data state memory cell. The memory cell includes a first electrode layer formed from a first conductive material, a second electrode layer formed from a second conductive material, and a first layer of a metal-doped chalcogenide material disposed between the first and second electrode layers, the first layer providing a medium in which a conductive growth can be formed to electrically couple together the first and second electrode layers. The memory cell further includes a third electrode layer formed from a third conductive material, and a second layer of a metal-doped chalcogenide material disposed between the second and third electrode layers, the second layer providing a medium in which a conductive growth can be formed to electrically couple together the second and third electrode layers.


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