Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2003-04-16
2004-08-10
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S624000, C438S422000, C438S619000, C438S652000, C438S775000, C438S763000, C438S757000, C438S761000, C438S744000, C438S724000, C257S760000, C257S750000, C257S644000, C257S758000, C148S217000, C427S249150
Reexamination Certificate
active
06774059
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method creating a layer comprising nitride such that this layer does not present problems of layer cracking after layer creation.
(2) Description of the Prior Art
The creation of semiconductor devices requires the deposition and further processing of layers of semiconductor material that collectively form a functional semiconductor device or component. For desired operation of the deposited layers of semiconductor material, these layers must be created meeting specific design requirements such as good planarity of the surface of the deposited layers and uniform distribution or density of the deposited material. In addition these layers must, after the creation thereof, remain in a state and condition that has originally been obtained for the layer. Most specifically, deposited layers of semiconductor material must maintain their uniform distribution of deposition immediately after the layer has been created and further during the expected lifetime of the therewith created semiconductor device or component. For this reason it is a basic requirement of a created layer of semiconductor material that this layer is and remains stress free after its creation since the presence of stress in the layer readily leads to the occurrence of for instance cracks that may be internal to the created layer or that may appear over surface regions of the created layer.
A number of methods have been provided for the reduction of stress related problems encountered in created layers of semiconductor material. For instance, to reduce problems created by thermal stress, narrow trenches can be created which counteract the thermal stress within a created layer. Other methods have been provided that use composite materials for the creation of a layer of semiconductor material. Other methods create carefully controlled voids in for instance a layer of dielectric. Specially controlled methods of deposition, by for instance controlling in an advantageous manner, deposition temperature for the deposition of a layer of aluminum alloy have also been explored. Yet another method provides for capping a stress-prone layer with for instance a high compressive stress oxide.
These and other methods all have as common objective the creation of a layer of semiconductor material that meets design requirements of deposition and reliability. Some of these methods address layers of specific materials comprising for instance dielectric materials. The invention addresses concerns of stress-induced problems of layer creation where the created layer of semiconductor material comprises silicon nitride, concerns that become more acute for thick layers of silicon nitride.
In a conventionally created layer of Plasma Enhanced (PE) silicon nitride, the created film of silicon nitride typically shows relatively high intrinsic film stress. This problem becomes even more pronounced where a thick layer of PE silicon nitride is created and has been observed to be significantly present in layers of PE silicon nitride having a thickness of about 2 &mgr;m or in excess thereof. Such a thick layer of PE silicon nitride is basic to and used for the creation of a semiconductor device that is functional as a Finger Print Detector, whereby a (human) finger is directly brought into contact with the thick layer of PE silicon nitride for the identification of a Finger Print shown over the surface thereof. The need for a relatively thick layer of PE silicon nitride becomes apparent when it is considered that the human skin, thereby including surfaces of an exposed finger, are prone to secrete moisture and salt, which are both substances that can have a significantly detrimental effect on operational and reliability aspects of a conventional semiconductor device. For this reason, the created layer of PE silicon nitride must be adequately thick so that sufficient protection is provided to underlying operational semiconductor device features and interfaces.
U.S. Pat. No. 6,136,688 (Lin et al.) shows a process to reduce SiN cracking.
U.S. Pat. No. 5,419,787 (Levi) shows a stress reduced insulator.
U.S. Pat. No. 5,665,632 (Lur et al.), U.S. Pat. No. 5,517,062 (Lur et al.), U.S. Pat. No. 5,716,888 (Lur et al.) and U.S. Pat. No. 4,824,697 (Ishihara) are related patents.
SUMMARY OF THE INVENTION
A principle objective of the invention is to provide a method for the creation of a relatively thick layer of PE silicon nitride that is highly stress resistant.
Another objective of the invention is to provide a method of creating a layer of PE silicon nitride that does not have problems of layer cracking after the layer of PE silicon nitride has been created.
In accordance with the objectives of the invention a new method of creating a relatively thick layer of PE silicon nitride. A conventional method of creating a layer of silicon nitride applies a one-step process for the creation thereof. Film stress increases as the thickness of the created layer of PE silicon nitride increases. A new method is provided for the creation of a crack-resistant layer of PE silicon nitride by providing a multi-step process. The main processing step comprises the creation of a relatively thick, compressive film of PE silicon nitride, over the surface of this relatively thick layer of PE silicon nitride is created a relatively thin (between about 150 and 500 Angstrom) layer of tensile stress PE silicon nitride. This process can be repeated to create a layer of PE silicon nitride of increasing thickness. A layer of PE silicon nitride can in this manner be created to a thickness of about 4 &mgr;m, whereby this thick layer of PE silicon nitride is free of stress and therefor free of therefrom following cracking of the layer of PE silicon nitride.
REFERENCES:
patent: 4824697 (1989-04-01), Ishihara et al.
patent: 5419787 (1995-05-01), Levi
patent: 5517062 (1996-05-01), Lur et al.
patent: 5665632 (1997-09-01), Lur et al.
patent: 5716888 (1998-02-01), Lur et al.
patent: 5877095 (1999-03-01), Tamura et al.
patent: 5985771 (1999-11-01), Moore et al.
patent: 6051511 (2000-04-01), Thakur et al.
patent: 6136688 (2000-10-01), Lin et al.
patent: 6414376 (2002-07-01), Thakur et al.
patent: 6420777 (2002-07-01), Lam et al.
patent: 6461985 (2002-10-01), Moore et al.
TSMC Patent TW 307928, (NP-0687-TW).
Chuang Poyo
Ni Chyi-Tsong
Ackerman Stephen B.
Keshavan Belur
Saile George O.
Smith Matthew
Taiwan Semiconductor Manufacturing Company
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