Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-10-22
2004-10-12
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S506000, C257S508000, C257S509000, C257S512000
Reexamination Certificate
active
06803622
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a semiconductor device and a method of manufacturing the same.
BACKGROUND OF THE INVENTION
Flash memory devices have recently been brought into frequent use as semiconductor storage devices. A conventional semiconductor memory device having Flash memory is shown in
FIGS. 14 and 15
.
FIGS. 14 and 15
are enlarged cross-sectional views of a memory region of the conventional semiconductor device
100
. The section shown in
FIG. 14
corresponds to the section taken along the X—X line of
FIG. 1
, and the section shown in
FIG. 15
corresponds to the section taken along the Y—Y line of FIG.
1
.
As shown in
FIG. 14
, STIs (shallow trench isolation)
40
for isolating element-area are formed in a semiconductor substrate
10
. An element-forming region
45
exists between every adjacent STIs
40
. On the top surface of each element-forming region
45
, a gate insulating film
20
is formed, and a floating gate electrode
35
is formed on the gate insulting film
20
. The floating gate electrode
35
is made up of doped polysilicon layers
30
,
60
. The top surface and the side surfaces of the floating gate electrode
35
are coated by an insulating film
70
. Therefore, the floating gate electrode
35
is encircled by insulating films and held floating. The insulating film
70
is a so-called ONO film made by stacking a silicon oxide film, a silicon nitride film and a silicon oxide film. Formed on the insulting film
70
is a control gate electrode
80
. The control gate electrode
80
is made of doped silicon. A silicide (for example, WSi) layer
90
is formed on the control gate electrode
80
. A silicon nitride film
95
is formed on the silicide layer
90
and a silicon oxide film
98
is further formed on the silicon nitride film
95
.
FIG. 15
is a cross-sectional view of the semiconductor device
100
taken along a plane being perpendicular to the extending direction of the floating gate electrode
35
and the control gate electrode
80
shown in FIG.
14
. As shown in
FIG. 15
, a silicon oxide film
99
is formed on side surfaces of the floating gate electrode
35
and the control gate electrode
80
.
Next referring to
FIGS. 17A and 17B
, a method of manufacturing the conventional semiconductor device
100
is briefly explained from the step after formation of the silicon oxide film
98
.
FIGS. 17A and 17B
correspond to the section along the Y—Y line of FIG.
1
.
As shown in
FIG. 17A
, after a layer such as the silicon oxide film
98
is formed by the conventional method, the silicon oxide film
98
and the silicon nitride film
95
are patterned by photolithography and RIE (reactive ion etching). After that, using the silicon nitride film
95
as a mask, the silicide layer
90
, the doped polysilicon layer (control gate electrode)
80
, the insulating film
70
, the doped polysilicon layers
30
,
60
and the gate insulating film
20
are selectively etched by RIE.
Thereafter, the structure is annealed in an oxygen atmosphere by RTO (rapid thermal oxidation) to form the silicon oxide film
99
as shown in FIG.
17
B.
FIGS. 16A and 16B
show a cross-sectional structure of the semiconductor device
100
along a boundary portion C
1
, between the floating gate electrode
35
and the control gate electrode
80
.
FIG. 16A
shows its aspect before the RTO processing and
FIG. 16B
shows its aspect after the RTO processing.
Before the RTO processing, side surfaces of the floating gate electrode
35
, insulating film
70
and control gate electrode
80
are flat as shown in FIG.
16
A.
After the RTO processing, however, a considerable thickness of the silicon oxide film
99
grows on side surfaces of the floating gate electrode
35
and the control gate electrode
80
, but almost no silicon oxide film grows on the side surface of the silicon nitride film
70
b
. That is, the silicon oxide film
99
grows locally. As a result, the silicon oxide film on the side surfaces of the floating gate electrode
35
, the control gate electrode
80
and the silicon nitride film
70
b
becomes significantly uneven in thickness. Therefore, distance d
1
, between the plane of the side surface of the silicon nitride film
70
b
and the plane of the side surfaces of the floating gate electrode
35
and the control gate electrode
80
becomes large.
Since the distance d
1
increases after the RTO processing while the distance d
1
is substantially zero before the RTO processing, a large mechanical stress is produced at that end of the insulating film
70
in the boundary portion C
1
, and this stress transmits to the gate insulating film
20
through the floating gate electrode
35
. In general, the gate insulating film
20
functions as a tunnel gate oxide film when the floating gate electrode
35
receives or delivers electric charges. Therefore, if a stress rises in the gate insulating film
20
, then electron traps are induced at that end of the gate insulating film
20
. This results in a problem such as fluctuation of the threshold voltage of the device or degradation of the electric charge mobility.
In general, as shown in
FIG. 8
, the greater the stress rising in the gate insulating film
20
, the electron traps increase. And as shown in
FIG. 10
, the change of the threshold voltage increases proportionally to the electron traps. Therefore, it is undesirable that the stress acting on the gate insulating film
20
increases.
In addition to that, as shown in
FIG. 9
, a change of the threshold voltage after repetitive write and erase (W/E) in a nonvolatile semiconductor storage device such as flash memory is considered to occur due to an increase of electron traps. An increase of the stress acting on the gate insulating film
20
invites an increase of electron traps in the nonvolatile semiconductor storage device. Also from this viewpoint, it is not desirable that the stress applied to the gate insulating film
20
increases.
There is a demand for a semiconductor device with lower stress acting on the gate insulating film and lower electrons trapped in the gate insulating film than those of conventional devices.
BRIEF SUMMARY OF THE INVENTION
A semiconductor device according to an embodiment of the invention comprises: a semiconductor substrate; a first insulating film formed on the top surface of the semiconductor substrate; a first gate electrode formed on the first insulating film; a second insulating film having a three-layered structure made by sequentially depositing a first kind of insulating layer, a second kind of insulating layer and a first kind of insulating layer on the first gate electrode; a second gate electrode formed on the second insulating film; a first plane including the side surface of the first gate electrode or the side surface of the second gate electrode; and a second plane including the side surface of the second kind of insulating layer, wherein distance between said first plane and said second plane does not exceed 5 nm.
A method of manufacturing a semiconductor device according to an embodiment of the invention comprises:
forming a first insulating film on the top surface of a semiconductor substrate; depositing a first gate electrode material on the first insulating film; forming a second insulating film having a three-layered structure including a first kind of insulting layer, a second kind of insulating layer and a first kind of insulting layer sequentially stacked on the first gate electrode material; depositing a second gate electrode material on the second insulating film; etching the second gate electrode material, the second insulating film and the first gate electrode material in a uniform pattern to form a first gate electrode made of the first gate electrode material and to form a second electrode made of the second gate electrode material; and oxidizing at least side surfaces of the fist gate electrode, side surfaces of the second gate electrode and side surfaces of the second insulating film in an ozone (O
3
) atmosphere.
A method of manufacturing a semiconductor device according to anothe
Matsuno Koichi
Shiozawa Jun-ichi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Wojciechowicz Edward
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