Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2002-07-03
2004-02-03
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06687895
ABSTRACT:
BACKGROUND
1. Field of the Invention
The invention relates to the process of designing an integrated circuit. More specifically, the invention relates to a method and an apparatus for reducing the output file size of an optical proximity correction process used in the design of an integrated circuit.
2. Related Art
Recent advances in integrated circuit technology have largely been accomplished by decreasing the feature size of circuit elements on a semiconductor chip. As the feature size of these circuit elements continues to decrease, circuit designers are forced to deal with problems that arise as a consequence of the optical lithography process that is typically used to manufacture integrated circuits. This optical lithography process can begin with the formation of a photoresist layer on the surface of a semiconductor wafer. A mask composed of opaque regions, which are generally formed of chrome, and light-transmissive clear regions (chromeless), which are generally formed of quartz, is then positioned over this photoresist-coated wafer. (Note that the term “mask” as used in this specification is meant to include the term “reticle.”) Light is then shone on the mask from a visible light source, an ultraviolet light source, or other electromagnetic radiation source.
This light is reduced and focused through an optical system that contains a number of lenses, filters, and mirrors. The light passes through the clear regions of the mask and exposes the underlying photoresist layer. At the same time, the light is blocked by opaque regions of mask, leaving underlying portions of the photoresist layer unexposed.
The exposed photoresist layer is then developed, typically through chemical removal of the exposed
on-exposed regions of the photoresist layer. The end result is a semiconductor wafer with a photoresist layer having a desired pattern. This pattern can then be used for etching underlying regions of the wafer.
One problem that arises during the optical lithography process is “line end shortening” and “pullback” caused by optical effects. This line end shortening and pullback is due to optical effects that cause the light to expose more of the resist under a line end than under other portions of the line.
In order to compensate for line end shortening, designers often add optical proximity correction (OPC) features, such as “hammer heads,” onto line ends. These corrections are then stored within a file that contains descriptions of features in the integrated circuit. Note that the corrections can be stored as differences (deltas) from the original features, or alternatively, as complete polygons for the corrected features. See, e.g., U.S. Pat. No. 6,370,679 for more information on one such implementation. Storing the corrections as differences from the original features has the advantage of maintaining the original feature dimensions and hierarchy within the file, whereas storing the corrected features as polygons removes the original feature dimensions from the file and often result in altered hierarchy. Unfortunately, storing the corrections as differences requires significantly larger amounts of storage (possibly ten to one hundred times more) than the original file.
A file size increase of ten times and above is very typical for the delta output format. Under certain circumstances, when the input file hierarchy is not favorably organized or the hierarchy is poorly managed, OPC can result in many local flattenings of the hierarchy, which may cause up to one hundred or more times file size increase. For example, ten 2 micrometer by 2 micrometer cells with one thousand instances, each such that no instance of the same cell has the same environment in the proximity neighborhood will give up to a one hundred or more times file size increase in delta format. For OPC purpose, the entire area needs to be flattened so consequently the OPC features will have a flat hierarchy.
What is needed is a method and an apparatus for reducing the size of the output file produced by an optical proximity correction process.
SUMMARY
One embodiment of the invention provides a system that facilitates reducing the size of an output file generated by an optical proximity correction (OPC) process. The system operates by first receiving an OPC output from an OPC process. Next, the system examines the OPC output to identify groups of identically sized segments with identical biases. The system then identifies adjoining segments with identical corner joining effects from the groups of identically sized segments. Next, the system creates a basic shape from the nearby segments with identical joining effects, and forms a shape group for the basic shape and adjoining segments. Finally, the system defines a child cell to represent the shape group and uses the child cell to represent different instances of the shape group, thereby reducing the amount of data required to encode the OPC output, thus reducing the OPC output file size.
In a variation on this embodiment, the system creates a transformation for each repetition of the child cell, wherein the transformation can specify a translation and/or rotation of the child cell.
In a variation on this embodiment, the system links the child cell and the transformation for each repetition of the child cell into a current cell.
In a variation on this embodiment, the system patches remaining geometries that have not been included in a shape group into the current cell.
In a variation on this embodiment, forming the shape group involves forming a connected shape group, wherein the connected shape group extends the basic shape to include additional adjacent segments.
In a variation on this embodiment, forming the shape group involves forming a disjoint shape group, wherein the disjoint shape group includes additional segments that are not adjacent.
In a variation on this embodiment, the system forms multiple shape groups from the groups of identical segments and represents each of the multiple shape groups with a different child cell.
In a variation on this embodiment, the system generates an output that includes the multiple shape groups and the remaining basic shapes that do not belong to the multiple shape groups.
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Ackman, P., et al., “Phase Shifting and Optical Proximity Corrections to Im
Dinh Paul
Numerical Technologies Inc.
Park Vaughan & Fleming LLP
Smith Matthew
LandOfFree
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