Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-11-13
2004-02-10
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S401000, C257S900000
Reexamination Certificate
active
06690046
ABSTRACT:
TECHNICAL FIELD
The invention pertains to methods of forming structures over semiconductor substrates, and in particular embodiments pertains to methods of forming transistors associated with semiconductor substrates. The invention also pertains to semiconductor assemblies.
BACKGROUND OF THE INVENTION
There are numerous applications in semiconductor processing in which it is desired to form conductive layers over oxides. For instance, transistor structures frequently comprise conductive layers formed over silicon dioxide (commonly referred to as a gate oxide). In some instances, the conductive materials comprise conductively doped silicon, and in such instances dopant can occasionally migrate through the oxide into an underlying substrate. In particular transistor devices, such dopant migration can be problematic. For instance, PMOS devices comprise an n-type channel region underneath a gate oxide, and can comprise p-type doped silicon over the gate oxide. If p-type dopant migrates from the silicon, through the oxide, and into the underlying substrate it will change the doping within the n-type channel. Such change can affect, and even destroy, electrical properties of the transistor. Accordingly, it can be desired to alleviate dopant migration relative to PMOS devices.
In contrast to the above-discussed problems which can be associated with PMOS devices, dopant migration is typically not problematic relative to NMOS devices. However, NMOS devices can have their own associated problems. For instance, it can be desired to form gate oxide for NMOS devices which is thicker than that utilized for PMOS devices. Such can be problematic in semiconductor wafer processing, in that both NMOS devices and PMOS devices are frequently formed over the same wafer. It would be desired to develop methodology which enables different gate oxide thicknesses to be associated with different transistors on the same wafer, and in particular applications desired to develop methodology to enable NMOS transistors to have thicker gate oxide than PMOS transistors.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the substrate. Nitrogen is formed within the silicon dioxide containing layer. Substantially all of the nitrogen within the silicon dioxide is at least 10 Å above the substrate. After the nitrogen is formed within the silicon dioxide layer, conductively doped silicon is formed on the silicon dioxide layer.
In another aspect, the invention encompasses a method of forming a pair of transistors associated with a semiconductor substrate. First and second regions of the substrate are defined. A first oxide region is formed to cover at least some of the first region of the substrate, and to not cover the second region of the substrate. Nitrogen is formed within the first oxide region. After the nitrogen is formed, a first conductive layer is formed over the first oxide region. The first conductive layer does not cover the second region of the substrate. After the first conductive layer is formed, a second oxide region is formed over the second region of the substrate. A second conductive layer is formed over the second oxide region. The first conductive layer is patterned into a first transistor gate, and the second conductive layer is patterned into a second transistor gate. First source/drain regions are formed proximate the first transistor gate, and the second source/drain regions are formed proximate the second transistor gate.
In other aspects, the invention pertains to semiconductor assemblies.
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Beaman Kevin L.
Moore John T.
Micro)n Technology, Inc.
Nelms David
Nhu David
Wells St. John P.S.
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