Semiconductor device and method of production of same

Details Semiconductor device and method of production of same Semiconductor device and method of production of same

2002-06-06

2004-03-09

Lee, Eddie (Department: 2811)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S618000, C438S637000, C438S639000, C438S640000, C438S667000, C438S668000, C438S675000

Reexamination Certificate

active

06703310

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of production of the same, more particularly relates to a semiconductor device in which the insulation is secured between an electrode pad and a semiconductor substrate at the side walls of a through hole passing through the electrode pad an the semiconductor substrate, and a method of production of the same.
2. Description of the Related Art
In the past, a semiconductor device to be mounted on a motherboard has been comprised of a semiconductor chip mounted on a wiring board called an “interposer”. This interposer has been considered necessary for aligning the positions of the electrode terminals of the semiconductor chip and motherboard.
If an interposer is used, however, the thickness of the semiconductor device increases by the amount of that thickness, so it is preferable not to use such an interposer as much as possible so as to meet with the recent demands for reducing the size of electronic equipment.
Therefore, in recent years, effort has been underway to develop a semiconductor device not requiring an interposer. A sectional view of such a semiconductor device of the related art is shown in FIG.
9
A.
The semiconductor device
101
of the related art is mainly comprised of a silicon substrate
102
and does not have an interposer. One surface
102
a
of the silicon substrate
102
has formed on it an electronic element formation layer
103
including a transistor or other electronic element. This is electrically connected with a via hole electrode pad
110
. An insulating film
104
prevents electrical connection of the via hole electrode pad
110
or main electrode pad
105
with the silicon substrate
102
.
The semiconductor element formation layer
103
and via hole electrode pad
110
have stacked over them an SiO
2
film
106
and an interconnection pattern
107
. The SiO
2
film
106
has a via hole
106
a
opened in it. The interconnection pattern
107
and via hole electrode pad
110
are electrically connected through this opening.
The via hole electrode pad
110
is provided integrally with the main electrode pad
105
. Further, the main electrode pad
105
and the silicon substrate
102
under it have a through hole
111
opened in them.
The through hole
111
is a characterizing feature of this type of semiconductor device and is provided to lead out the interconnection pattern
107
to the other surface
102
b
of the silicon substrate
102
. The interconnection pattern
107
led out to the other surface
102
b
is provided with solder bumps
108
functioning as external connection terminals to be aligned in position with the terminals of the motherboard (not shown).
FIG. 9C
is a plan view of the semiconductor device
101
seen from the direction of the arrow A of FIG.
9
A. For convenience in explanation, the interconnection pattern
107
is omitted.
The via hole
106
a
is a wide diameter circle at the bottom of which the via hole electrode pad
110
is exposed.
The semiconductor device
101
is fabricated by building in a structure new to the existing semiconductor device (LSI etc.)
109
shown in section in FIG.
11
. As will be explained using
FIG. 11
, the main electrode pad
105
is provided at the existing semiconductor device
109
as well. This is the location where originally bonding wires, stud bumps, etc. are bonded, signals are input and output, and power is supplied.
On the other hand, the via hole electrode pad
110
(
FIG. 9C
) is one of the new structures and is not provided in existing semiconductor devices
109
. The via hole electrode pad
110
is newly provided to increase the contact area with the interconnection pattern
107
(
FIG. 9A
) by providing a wide-diameter via hole
106
a
above it and to prevent peeling with the interconnection pattern
107
due to stress and poor electrical contact arising due to the same.
In this way, in the semiconductor devices of the related art, in addition to the originally present main pad
105
, a via hole pad
110
is newly provided as a part for electrical connection with the interconnection pattern
107
and, to ensure reliable electrical connection, a wide-diameter circular via hole
106
a
is opened above the via hole electrode pad
110
.
Referring now to
FIG. 9B
, the through hole
111
is defined by an opening
102
c
of the silicon substrate
102
, an opening
104
a
of the insulating film
104
and an opening
105
a
of the main electrode pad
105
. Therefore, at the side walls of the through hole
111
, the silicon substrate
102
and the main electrode pad
105
are insulated from each other by being distant from each other by a height D
2
along the side walls.
However, the height D
2
is relatively small, so it is difficult to secure sufficient insulation between the silicon substrate
102
and the main electrode pad
105
at the side walls of the through hole
111
.
Moreover, there is also a problem in the process of producing the semiconductor device
101
. This will be describe by referring to
FIGS. 10A and 10B
, which are sectional views of the semiconductor device
101
of the related art.
First, a silicon substrate in the state shown in
FIG. 10A
is prepared. In this state, the insulating film
104
, the main electrode pad
105
and the electronic element forming layer
103
are formed on the silicon substrate
102
.
Next, as shown in
FIG. 10B
, a laser beam is fired from the side of the main electrode pad
105
and the portion struck by the laser beam vaporizes, whereby the through hole
111
is formed.
In this method, however, the materials of the main electrode pad
105
and/or the silicon substrate
102
are vaporized by the laser beam and the vaporized conducting materials (silicon, aluminum, copper, etc.) deposit on the opening
104
a
of the insulating film
104
, so there is the danger of electrically connecting the silicon substrate
102
and the main electrode pad
105
.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device having a through hole passing through an electrode pad and a semiconductor substrate, in which sufficient insulation between the electrode pad and the semiconductor substrate at the side walls of the through hole is secured.
Another object of the present invention is to provide a method of producing a semiconductor device including forming a through hole passing through an electrode pad and a semiconductor substrate, in which the danger of electrically connecting the electrode pad and the silicon substrate is reduced.
To achieve the object, according to a first aspect of the present invention, there is provided a semiconductor device comprised of a semiconductor substrate; an electronic element formed on one surface of the semiconductor substrate; an electrode pad having an extension, formed on that one surface and electrically connected with the element; a through hole passing through the electrode pad and the semiconductor substrate; an insulating film formed on at least the other surface of the semiconductor substrate, an inner wall of the through hole, and the electrode pad including the extension; a via hole provided in the insulating film on the extension of the electrode pad; and an interconnection pattern electrically leading out the electrode pad to the other surface of the semiconductor substrate through the through hole and the via hole, said through hole having a diameter larger at a portion passing through the electrode pad than a portion passing through the semiconductor substrate.
In one embodiment, the interconnection pattern electrically leads out the electrode pad to the one surface of the semiconductor substrate as well. It is possible to stack a plurality of these semiconductor devices together and electrically connect interconnection patterns of facing surfaces of each bottom semiconductor device and top semiconductor device through external connection terminals.
In one embodiment, the through holes are filled by a conductor electrically connected with the

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