Information processing system with a memory control unit for ref

Details Information processing system with a memory control unit for ref Information processing system with a memory control unit for ref

1997-11-17

1998-10-13

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

711172, G06F 1216

Patent

active

058227539

ABSTRACT:
In an information processing system, a wait state signal is inserted into a RDY signal, according to which data are transmitted through memory and I/O buses. A CPU controls the number of the wait state signal to adjust the difference of the transfer speeds of the memory and I/O buses. An MCU (Memory Controller Unit) includes configuration and refresh timer registers for specifying the configuration and the refresh cycle of a memory to be accessed.

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