Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2003-04-15
2004-09-07
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S163000
Reexamination Certificate
active
06787405
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly to a polysilicon type LCD.
2. Description of the Prior Art
A liquid crystal display (LCD) is a flat panel display with characteristic of low power consumption. In comparison with a cathode ray tube (CRT) display of the same viewing size, what the liquid crystal display provided is much lower in occupied space and weight and without a curved panel problem. Hence, the popular of the liquid crystal display prompts the relates products being widely applied in various sorts of merchandises such as pocket calculators, electronic dictionaries, watches, mobile phones, portable notebooks, communication terminal, display panels, desk-top monitors and even high dpi (dots per inch) televisions (HDTV) etc. Consequently, the popularity of display and correlated products thereof seems promote the LCD to become the most brilliant star in the present century. Among various LCD display type, the most attractive type is TFT(thin film transistor)-LCD. Due to large viewing angle and high contrast characteristics, the TFT-LCD display of active type are better than those of a super-twisted nematic liquid crystal display (STN-LCD) of passive matrix type. Moreover, the TFT-LCD shows more rapid response time (such as several ms) than the STN-LCD does (such as several hundred milliseconds).
In a conventional LCD, an amorphous silicon (a—Si) has been a long term choice of material for a thin film transistor (TFT) to fabricate an LCD. However, a polysilicon substitute for the amorphous silicon for the TFT is become a trend due to the polysilicon has a higher carrier (electron or hole) mobility than the amorphous silicon. Additionally, the polysilicon TFT has extra benefits such as the driving circuit with complimentary metal-oxide-semiconductor (CMOS) TFT on the LCD panel can be formed simultaneously with the pixel fabrication. As a result of the above-mentioned, the switch performance of the polysilicon-type TFT-LCD is better than the amorphous-type silicon TFT-LCD.
Certainly, the polysilicon TFT-LCD is not perfect. For instance, when the TFT is at the off-state, often there is still a large drain leakage current. However, it can usually be overcome by the technique of a lightly doped drain (LDD) or a dual gate structure. The U.S. Pat. No. 5,940,151 invented by Yong-Min Ha etc. is one example.
The fabricating method of Ha's patent is briefly described as follows: Firstly, please refer to
FIG. 1A
, which is a plan view illustrating a pixel portion of a TFT-LCD. A signal line
40
and a scanning line
50
vertically intersect each other as shown in
FIG. 1A
, wherein the scanning line
50
is directly connected to a gate electrode
14
of the pixel TFT portion and the signal line
40
is connected to a source electrode
11
S (as shown in
FIG. 1B
) at the pixel TFT. Storage capacitor electrodes
17
and
18
are connected to a drain electrode
11
D of the pixel TFT. The upper electrode of the storage capacitor is connected to the outside of the pixel, that is, the contact region of the top capacitor electrode
18
is outside of the pixel. A pixel electrode
15
is also connected to the drain electrode
11
D of the pixel TFT.
FIGS. 1B
to
1
E are cross-sectional views including a series of fabrication processes for a pixel (taken along line a—a′ of
FIG. 1A
) and the drive circuit thereof. First of all, an n-type heavily doped silicon layer and a metal layer are sequentially formed on an insulating substrate
1000
. Then, through a photolithography and an etching technique (a first photo mask), source and drain electrode regions
11
S and
11
D of the pixel TFT are defined wherein the drain region
11
D includes a first storage capacitor electrode
17
, and source and drain electrode regions
21
S and
21
D of the n-type TFT are also defined at the drive circuit. A silicon thin film is subsequently formed on the overall surface over the substrate. Thereafter, the silicon thin film is defined by a photolithography and an etching technique (a second photo mask) to form a predetermined region
10
′ for a channel
10
and a lightly doped drain (LDD)
12
of the pixel TFT and another predetermined region
20
n
′ for a channel
20
n
and a lightly doped drain (LDD)
22
of a n-type TFT, wherein the defined silicon regions
10
′ and
20
n
′ are superposed on the corresponding source/drain regions thereof to form electrical connections. Moreover, the silicon thin film is also defined to form the other predetermined region
20
p
′ for a channel
20
p
and source/drain electrodes
23
S,
23
D of a p-type TFT.
Referring to
FIG. 1C
, an oxide layer and a gate metal layer are sequentially formed over the substrate. Then, a gate electrode
14
, a storage capacitor dielectric layer
100
and a storage capacitor top electrode
18
of the pixel TFT are defined by a photolithographic and an etching technique (a third photo mask). Simultaneously, at the drive circuit portion, a gate electrode
24
n
of the n-type TFT and a gate electrode
24
p
of the p-type TFT are defined. Thereafter, n-type impurities are lightly doped into the substrate including the pixel TFT and the n-type TFT and the p-type TFT at the drive circuit.
Turning to the cross-sectional view shown in
FIG. 1D
, a photoresist pattern
63
is formed (a fourth photo mask) to cover the n-type TFT at the pixel and drive circuit portions and to bare the silicon thin film of the p-type TFT. Then, p-type conductive impurities are implanted to form source and drain electrodes
23
S and
23
D of the p-type TFT. Thereafter, the photoresist pattern
63
is removed. As shown in
FIG. 1E
, a passivation layer
300
is deposited on the overall surface over the substrate and then, contact holes are formed by a photolithography and an etching technique (a fifth photo mask) respectively at the pixel portion and the drive circuit portion. Thereafter, an ITO is deposited on the overall surface over the substrate including the passivation layer
300
and the contact holes. Finally, a pixel electrode
15
is defined by a photolithography and etching technique (a sixth photo mask) and connected to the storage capacitor and the pixel TFT, and simultaneously, a transparent conductive line
25
is formed for connecting the p-type TFT and the nN-type TFT at the drive circuit.
SUMMARY OF THE INVENTION
A method of forming a liquid crystal display device with a pixel TFT, a bottom electrode of pixel capacitor CL, and a storage capacitor Cs in a pixel region, and an n-type TFT and a p-type TFT in a driving circuit region is disclosed. Firstly, a transparent conductive oxide layer, a metal layer and an n-type heavy doped silicon layer are sequentially formed on a glass substrate. Thereafter, a patterning step is performed to define some predefined regions for above devices. After an un-doped active layer and a gate oxide layer are formed in order on all patterned surfaces, another patterning step is done to form a first, a second, and a third preserved region, respectively, for a LDD region of the n type TFT, source/drain regions for the p type TFT and a LDD region for pixel TFT and Cs. Afterward, gate electrodes are formed for aforementioned TFT and an upper electrode for Cs. Subsequently, a blanket nLDD implant is performed by implant n-type impurities into the active layer. Thereafter, a p type source/drain implant is carried out using a photoresist pattern as a mask. After removing the photoresist pattern, a passivation layer is formed on all areas. Next an annealing is performed to active the implant impurities. Another patterning process is then performed to form contacts for driving circuit and end terminal of pixel panel by patterning the passivation layer and form the bottom electrode of C
L
by further patterning the n-type heavy doped silicon layer, and the metal layer to expose the transparent conductive oxide layer.
REFERENCES:
patent: 5633182 (1997-05-01), Miyawaki et al.
patent: 59401
Chaudhari Chandra
Toppoly Optoelectronics Corp.
Troxell Law Office PLLC
LandOfFree
Method of fabricating liquid crystal display devices... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating liquid crystal display devices..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating liquid crystal display devices... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3270568