Lead on chip type semiconductor package

Details Lead on chip type semiconductor package Lead on chip type semiconductor package

2000-11-10

2004-09-21

Lee, Eddie (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S666000, C257S690000, C257S691000, C257S676000, C257S669000, C257S787000, C257S696000

Reexamination Certificate

active

06794745

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a lead on chip (LOC) type semiconductor package. More particularly, the present invention relates to an LOC type semiconductor package constructed in such a manner that a lead frame can accommodate mounting of a semiconductor chip having a size within a range of suitable sizes.
2. Description of the Related Art
Semiconductor chips such as DRAMs and SRAMs are becoming more highly integrated as memory capacities of electronic and information appliances become larger. Additionally, if feature sizes remain constant, the semiconductor chip size must be larger to accommodate greater capacity in a single chip. On the other hand, process improvements can reduce the required size of a semiconductor chip. The trend in semiconductor packaging is to decrease the sizes of completed semiconductor chip packages to make electronic and information appliances smaller and lighter. A conventional type of semiconductor package has a lead fame with a die pad for a semiconductor chip and leads surrounding the die pad. The die pad of the conventional type package has a size corresponding to a specific size of semiconductor chip and cannot accommodate larger semiconductor chips.
Another type of semiconductor chip package is the lead on chip (LOC) type, which does not include a die pad. Instead of attaching a semiconductor chip to a die pad, an adhesive tape directly attaches the semiconductor chip to leads of a lead frame. Accordingly, an LOC type semiconductor chip package has the leads on the surface of the semiconductor chip. Conventional LOC type semiconductor packages having a variety of structures are disclosed in: U.S. Pat. No. 5,428,247, entitled “Down-bonded lead on chip type semiconductor device”; U.S. Pat. No. 5,572,066, entitled “Lead on chip semiconductor device and method for its fabrication”; U.S. Pat. No. 5,733,800, entitled “Underfill coating for LOC package”; U.S. Pat. No. 5,821,606, entitled “LOC semiconductor package”; and U.S. Pat. No. 5,834,830, entitled “LOC package and fabricating method thereof”, which are hereby incorporated by reference in their entirety.
In development of the conventional LOC type semiconductor package, the semiconductor chip is developed first and then the shape of the lead frame is designed according to the size of the semiconductor chip. For example, when a semiconductor chip is 5000 mm
2
in size, the shape of the lead frame corresponds to this size. In case of a semiconductor chip having a size of 4000 mm
2
, the shape of the lead frame is according to the size, 4000 mm
2
. However, a lead frame fabricated through the above procedure can accommodate semiconductor chip fitting thereto but cannot mount semiconductor chips having different sizes. For instance, a lead frame designed for a 5000 mm
2
semiconductor chip typically cannot accommodate smaller (e.g., 4000 mm
2
) semiconductor chips, for example, because a smaller semiconductor chip does not provide the full area needed for attaching the leads to the chip.
Accordingly, a process or design change that changes the size of the semiconductor chip typically requires a new design for the lead frame of the conventional LOC type package. This decreases production efficiency. Methods and structures that permits use of the same lead frame design for different sizes of semiconductor chips are sought.
SUMMARY OF THE INVENTION
In accordance with an embodiment of the present invention, an LOC type semiconductor package has leads of a lead frame shaped to accommodate semiconductor chips of different sizes and bond pad arrangements such as conventional single row and double row configurations. Accordingly, a change in semiconductor chip design that changes the size of a semiconductor chip does not require a new design for the lead frame. Accordingly, process changes or chip redesign are more efficient because less redesigning of the LOC package is required. Additionally, the same lead frame design can be used in different products that have different chip sizes, and the efficiency of mass production and reduced numbers of parts stocked for lead frames reduces the manufacturing costs of the products.
In one embodiment of the present invention, the leads of a lead frame include general leads and stable leads that are distinguished according to their roles. The general leads include general inner leads and general outer leads. The general inner leads are sealed in a molding resin but separated from a semiconductor chip, and the general outer leads extend out of the molding resin for electrical connections to external circuitry. The stable leads include stable inner leads and stable outer leads. The stable inner leads are sealed in the molding resin, and stable outer leads outwardly extended from the molding resin.
The ends of the general leads are at the periphery of the semiconductor chip and separated from the semiconductor chip, such that they do not come into contact with the semiconductor chip. Wires electrically connect the general leads to corresponding bonding pads of the semiconductor chip, so that the general inner leads serve as signal exchange paths. The ends of the stable leads are on the surface of the semiconductor chip, and wires electrically connect the stable leads to respective bonding pads on the semiconductor chip. The stable inner leads not only serve as signal exchange paths, but also press or attach to the semiconductor chip to fix the position of the semiconductor chip.
According to the present invention, only the stable inner leads are on the surface of the semiconductor chip, and semiconductor chips in a variety of sizes can be flexibly mounted on the lead frame. To achieve this flexibility, the stable inner leads extend to contact areas well within the boundaries of a semiconductor chip so that the area of a smaller semiconductor chip will still contain the contact areas. Thus, a new lead frame design is not required whenever the semiconductor chip size is changed. In addition, the present invention can maximize the flexibility of the lead frame to meet the mass-production system of “a small number of kinds but mass production”.


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