Transfer attribute encoding within an address on a bus

Details Transfer attribute encoding within an address on a bus Transfer attribute encoding within an address on a bus

1999-09-29

2004-03-23

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Peripheral adapting

C710S001000, C710S023000, C710S033000, C710S100000, C710S120000, C712S043000

Reexamination Certificate

active

06711636

ABSTRACT:

FIELD OF THE INVENTION
The present invention is related to computer systems, and more particularly to address attribute encoding within an address on a bus.
BACKGROUND INFORMATION
Today's computer systems are very advanced, versatile, and sophisticated. Often, computers include and have to accommodate more than one interconnect network, where each network follows a different network protocol. For instance, computers are commonly called upon to accept and process data from a wide variety of Peripheral Component Interconnect (PCI) devices such as modems, disk drives, network controllers, and printers via a PCI bus. Generally a bridge is interposed between the different networks and acts as an interface between the networks. All read/write operations involving PCI devices are routed to/from a PCI device via the PCI bus, through the bridge, to a memory controller and to/from the main memory. Because the bridge acts as an interface between two bus schemes it must accomplish certain tasks so that the data may be transferred across the two bus schemes. These tasks include encoding and translating the data for compatibility when transferring data from one bus scheme to another. Usually a bridge is used to overcome certain limitations of the older and slower PCI bus by interposing the bridge between the PCI bus and a newer and faster bus architecture. This poses several problems in transmitting data across the two bus schemes through the bridge, because, in many cases, the newer and faster bus uses a different method for encoding the data transmitted across the bus. To facilitate compatibility between the two bus schemes, the bridge must translate and encode the data to be transmitted from one bus to another through the bridge such that the data is transmitted across the two bus schemes efficiently.
Currently, byte swapping to handle little endian/big endian transformations are done by configuring each PCI device. Once configured, the device stays in that configuration until changed.
What is needed is a system and method for handling such byte swapping transformations on a transfer by transfer basis. This would result in faster, more flexible, data transfers between the two networks.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, in a computer system having a plurality of modules connected by a bus, wherein;the plurality of modules includes a first module and wherein the system has a word width of two or more bytes, a system and method of byte swapping bytes within a word to be written to a location. An address is constructed, wherein constructing an address includes inserting address bits pointing to the location and activating an attribute bit in the address indicating whether bytes within the word should be swapped. The address and the word are driven on the bus and received at the first module. If the attribute bit is active, the word is byte swapped.
According to one aspect of the present invention, in a computer system having a plurality of modules connected by a bus, wherein the plurality of modules includes a first module and wherein the system has a word width of two or more bytes, a system and method of byte swapping bytes within a word to be read from a location. An address is constructed, wherein constructing an address includes inserting address bits pointing to the location and activating an attribute bit in the address indicating whether bytes within the word should be swapped. The address is driven on the bus and received at the first module. The word is fetched and, if the attribute bit is active, the word is byte swapped.
According to yet another embodiment, a computer system includes a bus and first and second devices connected to the bus. The first device includes byte swapping capability at the transfer level. The second device constructs an address having an attribute bit and drives the address on the bus. The attribute bit indicates whether bytes within the word should be swapped. When the first device receives the address from the bus, it checks if the attribute bit is active and, if the attribute bit is active, byte swaps a word associated with the address.


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IBM—Technical Disclosure Bulletin, vol. 38, No. 9, Sep. 1995, pp. 237-240.

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