Circuit and method using data synchronization for battery power

Telecommunications – Receiver or analog modulated signal frequency converter – With particular receiver circuit

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Details

34082514, 34082544, 3408252, H04B 116

Patent

active

058226893

ABSTRACT:
A battery saving circuit in a paging receiver operates in an idle mode and a batch mode. A power supply section generates operating power for the paging receiver. A receiving section receives paging information and converts the paging information into digital signals. A switching section provides operating power to the receiving section in response to a battery supply signal. A wordsync pattern detector connected to the receiving section detects wordsync periods during the batch mode, analyzes digital signals received at a starting interval of the wordsync period, and generates a wordsync pattern detection signal when wordsync pattern data is detected. The wordsync pattern data is made up of a predetermined number of bits within the digital signals received during the starting interval of the wordsync period. Operating power is provided during the starting interval of the wordsync period and is interrupted when the wordsync pattern detection signal is generated. Data received after the wordsync period is synchronized based on an ending position of the wordsync period.

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