Memory cell with tight coupling

Details Memory cell with tight coupling Memory cell with tight coupling

2000-03-01

2004-01-13

Baumeister, B. William (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S310000, C257S314000, C257S315000, C257S325000

Reexamination Certificate

active

06677640

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to information storage, and more particularly to solid state memory used in information storage systems.
BACKGROUND OF THE INVENTION
A modern information storage system should acquire information quickly, maintain the information with integrity over time, and provide for the quick and accurate retrieval and erasing of the information. As the demand for miniature hand held communication and other data processing devices increases, the demand for smaller nonvolatile data storage devices increases. A flash memory device, such as erasable programmable read only memory (EPROM) or an electrically erasable programmable read only memory (EEPROM), is one type of information storage device used in modern nonvolatile information storage systems.
FIG. 1
is a cross-sectional view of a prior art flash memory cell
100
. Flash memory cell
100
includes substrate
103
, source region
106
, drain region
109
, channel
112
, oxide
115
, floating gate
118
, dielectric layer
121
, and control gate
124
. Dielectric layer
121
comprises a three layer oxide-nitride-oxide dielectric.
In flash memory cell
100
, information is stored on floating gate
118
as electronic charge. To facilitate the quick acquisition of information in flash memory cell
100
, the cell is designed to have a large capacitance between control gate
124
and the floating gate
118
. As the density of memory cells in a solid state memory is increased by scaling the physical dimensions of the cells, the area of floating gate
118
is decreased, which decreases the capacitance and coupling between control gate
124
and floating gate
118
. Unfortunately, this decrease in coupling reduces the electric field between the substrate and the floating gate during a write operation. A decrease in the electric field decreases the rate at which hot electrons flowing in channel
112
are injected onto floating gate
118
and increases the time to store charge on the floating gate
118
.
Information must be retained in flash memory cell
100
on floating gate
118
for a long period of time. As described above, as flash memory cells are scaled, the area of the floating gate in each cell is decreased and the capacitance between the floating gate and the control gate is decreased. A smaller capacitance results in less charge being injected into the floating gate. For a particular leakage current, a memory cell having less stored charge loses its information more quickly than a memory cell having more stored charge. One solution to this problem is to substitute a material having a high dielectric constant for dielectric
121
in flash memory cell
100
. Unfortunately, materials that have a high dielectric constant and are compatible with integrated circuit manufacturing processes often have a high leakage current, which decreases the storage lifetime of the stored information for a fixed amount of charge.
Quick and accurate retrieval of information from flash memory cell
100
requires accurately sensing the charge stored on floating gate
118
. A large amount of stored charge provides a signal that is easier to accurately sense than a small amount of stored charge. A large amount of stored charge also decreases the read time at the sensing device. Unfortunately, as devices are scaled to a small fraction of a micron, and the operating voltages are reduced, the charge on floating gate
118
is often decreased, thus making the quick and accurate retrieval of information more difficult. Flash memories already operate with relatively little stored charge, so as the stored charge is decreased further by scaling the physical dimensions of a memory cell, there is an increase in the number of errors at the sense amplifier when reading information from the scaled flash memory cell
100
.
For these and other reasons there is a need for the present invention.
SUMMARY OF THE INVENTION
The above mentioned problems with flash memory cells and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
A memory cell or nonvolatile memory cell having a dielectric sandwich, insulating sandwich, or coupling dielectric that is capable of increasing the coupling in the memory cell is disclosed. The dielectric sandwich is thin and has at least one high permittivity layer having a thickness of between about 140 and 240 angstroms. The dielectric sandwich also has at least one oxide layer formed at a temperature above the crystallization temperature of the high permittivity layer. In the flash memory cell, the dielectric sandwich is located between the control gate and the floating gate and provides for tight coupling between the control gate and the floating gate.


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