Bandwidth reduction for zone rendering via split vertex buffers

Details Bandwidth reduction for zone rendering via split vertex buffers Bandwidth reduction for zone rendering via split vertex buffers

2001-12-31

2004-07-13

Bella, Matthew C. (Department: 2676)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Addressing

C345S418000, C345S539000, C345S564000

Reexamination Certificate

active

06762765

ABSTRACT:

BACKGROUND
1. Field
The present invention relates generally to graphics systems and more particularly to graphics-rendering systems.
2. Background Information
Computer graphics systems are commonly used for displaying graphical representations of objects on a two-dimensional video display screen. Current computer graphics systems provide highly detailed representations and are used in a variety of applications. In typical computer graphics systems, an object to be represented on the display screen is broken down into graphics primitives. Primitives are basic components of a graphics display and may include points, lines, vectors and polygons, such as triangles and quadrilaterals. Typically, a hardware/software scheme is implemented to render or draw the graphics primitives that represent a view of one or more objects being represented on the display screen.
The primitives of the three-dimensional objects to be rendered are defined by a host computer in terms of primitive data. For example, when the primitive is a triangle, the host computer may define the primitive in terms of X, Y and Z coordinates of its vertices, as well as the red, green and blue (R, G and B) color values of each vertex. Additional primitive data may be used in specific applications.
Image rendering is the conversion of a high-level object-based description into a graphical image for display on some display device. For example, an act of image rendering occurs during the conversion of a mathematical model of a three-dimensional object or scene into a bitmap image. Another example of image rendering is converting an HTML document into an image for display on a computer monitor. Typically, a hardware device referred to as a graphics-rendering engine performs these graphics processing tasks. Graphics-rendering engines typically render scenes into a buffer that is subsequently output to the graphical output device, but it is possible for some rendering-engines to write their two-dimensional output directly to the output device. The graphics-rendering engine interpolates the primitive data to compute the display screen pixels that represent the each primitive, and the R, G and B color values of each pixel.
A graphics-rendering system (or subsystem), as used herein, refers to all of the levels of processing between an application program and a graphical output device. A graphics engine can provide for one or more modes of rendering, including zone rendering. Zone rendering attempts to increase overall 3D rendering performance by gaining optimal render cache utilization, thereby reducing pixel color and depth memory read/write bottlenecks. In zone rendering, a screen is subdivided into an array of zones and per-zone instruction bins, used to hold all of the primitive and state setting instructions required to render each sub-image, are generated. Whenever a primitive intersects (or possibly intersects) a zone, that primitive instruction is placed in the bin for that zone. Some primitives will intersect more than one zone, in which case the primitive instruction is replicated in the corresponding bins. This process is continued until the entire scene is sorted into the bins. Following the first pass of building a bin for each zone intersected by a primitive, a second zone-by-zone rendering pass is performed. In particular, the bins for all the zones are rendered to generate the final image.
A tile-based graphics architecture like zone rendering requires the screen-space sorting (i.e., binning) of primitives. Each primitive of the scene must be compared to the array of the screen-space zones and replicated into the bin lists associated with intersecting zones. With respect to per-primitive information, this binning requires only the screen-space X and Y positions of the object vertices. However, object vertices typically include other data items, such as Z, W, color and texture coordinates. These other data items are not required for the binning process, yet comprise the majority of the object's per-vertex data and require substantial storage. Conventional implementations require reading complete vertex data given a coarse granularity of memory read accesses. As only the X and Y data are being used, this results in poor memory bandwidth utilization.
What is needed therefore is a vertex buffer configuration that reduces the hardware memory bandwidth requirements and improves memory utilization, particularly for unified memory architecture (UMA) configurations.


REFERENCES:
patent: 5696944 (1997-12-01), Krech, Jr.
patent: 6344852 (2002-02-01), Zhu et al.
patent: 6535209 (2003-03-01), Abdalla et al.

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