Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-03-18
2004-03-16
Graybill, David E. (Department: 2827)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257S723000, C257S758000, C257S704000, C438S622000, C438S464000
Reexamination Certificate
active
06706624
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to fabrication of high density interconnect (HDI) modules, and more particularly to methods for making multichip modules by using a substrate made by encapsulating electrical conductors.
BACKGROUND OF THE INVENTION
High density interconnect assemblages such as those described in U.S. Pat. No. 4,783,695, issued Nov. 8, 1988 in the name of Eichelberger et al., and in numerous other patents, are finding increased usage. In one form of HDI assemblage, a dielectric substrate such as alumina has a planar surface and one or more wells or depressions. Each well or depression extends below the planar surface by the dimension of a component which is to become part of the HDI assemblage. The component is typically an integrated circuit, having its electrical connections or contacts on an upper surface. Each component is mounted in a well dimensioned to accommodate the component with its contacts in substantially the same plane as the planar surface of the substrate. The components are typically held in place in their wells or depressions by an epoxy adhesive. A layer of dielectric material such as Kapton polyimide film, manufactured by DuPont of Wilmington, Del., is laminated to the devices using ULTEM polyetherimide thermoplastic adhesive, manufactured by General Electric Plastic, Pittsfield, Mass., which is then heat-cured at about 260° to 300° C. in order to set the adhesive.
The polyetherimide adhesive is advantageous in that it bonds effectively to a number of metallurgies, and can be applied in a layer as thin as 12 micrometers (&mgr;m) without formation of voids. Further, it is a thermoplastic material, so that later removal of the polyimide film from the components is possible for purposes of repair by heating the structure to the glass transition temperature of the polyetherimide while putting tension on the polyimide film.
Another known method for making HDI modules includes applying the chips, electrode-side-down, onto an adhesive-faced dielectric layer. The chips are then encapsulated in a rigid material, which in one embodiment is Plaskon, an epoxy material, to form a rigid molded-chip-plus-dielectric-sheet piece. The electrical interconnections are made by means of laser-drilled vias through the dielectric sheet, followed by patterned deposition of electrically conductive metallization.
SUMMARY OF THE INVENTION
A method according to one aspect of the invention is for generating a multi-chip module. The method comprises the steps of procuring a dielectric sheet defining a surface, and tensioning the dielectric sheet to provide a measure of rigidity to the surface. One or more electrical conductors is applied to the surface of the dielectric sheet in a predetermined pattern. The electrical conductors have a predetermined thickness. In one embodiment of the invention, the thickness is 40 thousandths of an inch (0.040″), and the surface of the dielectric sheet is coated with adhesive to retain the conductors. Encapsulating material is applied to the surface of the dielectric sheet in a thickness sufficient to encapsulate the electrical conductors, to thereby generate a rigid substrate element. Apertures, which may be through apertures, are fabricated, formed or defined in the rigid substrate element at predetermined locations at which semiconductor or solid-state chips are to be placed in or on the multi-chip module. The semiconductor chips are placed on a second dielectric substrate at locations registered with the apertures or through apertures, with electrical interconnects of the chips facing in a particular direction. In a particular embodiment of the invention, the second dielectric sheet has adhesive on one of its surfaces, and that side of the semiconductor or solid-state chips having electrical connection pads or electrodes of the semiconductor or solid-state chips are placed on the adhesive of the second sheet. The rigid substrate element is affixed to the second dielectric sheet with the semiconductor or solid-state chips extending into or through the apertures. A flexible multilayer dielectric interconnection sheet carrying interconnection conductor patterns is applied over at least the electrical connection pads or electrodes of some of the semiconductor or solid-state chips, for making connections between at least some of the interconnection conductor patterns of the interconnection sheet and some of the electrical connection pads. In a particular embodiment of the invention, the connections are made with the aid of plated-through vias.
In one variant of the method, a layer of encapsulant material is removed or shaved from at least one surface of the rigid substrate element before the step of affixing the rigid substrate element to the second dielectric sheet. In another variant, the step of applying to the surface of the dielectric sheet, in a predetermined pattern, one or more electrical conductors having a predetermined thickness includes the step of applying adhesive to the surface of the dielectric sheet, and applying the one or more electrical conductors to the adhesive. In another mode of the method of the invention, an electrically or thermally conductive plate is affixed to the rigid substrate element on that side of the multichip module remote from the flexible multilayer dielectric interconnection sheet.
REFERENCES:
patent: 4783695 (1988-11-01), Eichelberger et al.
patent: 5048179 (1991-09-01), Shindo et al.
patent: 5049980 (1991-09-01), Saito et al.
patent: 5073814 (1991-12-01), Cole et al.
patent: 5144747 (1992-09-01), Eichelberger
patent: 5338975 (1994-08-01), Cole et al.
patent: 5359496 (1994-10-01), Kornrumpf et al.
patent: 5373627 (1994-12-01), Grebe
patent: 5422514 (1995-06-01), Griswold et al.
patent: 5452182 (1995-09-01), Eichelberger et al.
patent: 5739585 (1998-04-01), Akram et al.
patent: 5757072 (1998-05-01), Gorowitz et al.
patent: 5808878 (1998-09-01), Saito et al.
patent: 6274391 (2001-08-01), Wachtler et al.
patent: 6555906 (2003-04-01), Towie
patent: 488574 (1992-06-01), None
Gorczyca Thomas Bert
Kapusta Christopher James
Graybill David E.
Lockheed Martin Corporation
Mitchell James
Morris LLP Duane
LandOfFree
Method for making multichip module substrates by... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for making multichip module substrates by..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for making multichip module substrates by... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3246043